CAT25010 CATALYST [Catalyst Semiconductor], CAT25010 Datasheet - Page 4

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CAT25010

Manufacturer Part Number
CAT25010
Description
1K/2K/4K SPI Serial CMOS EEPROM
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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The CAT25010/20/40 supports the SPI bus data
transmission protocol. The synchronous Serial Peripheral
Interface (SPI) helps the CAT25010/20/40 to interface
directly with many of today’s popular microcontrollers.
The CAT25010/20/40 contains an 8-bit instruction
register. (The instruction set and the operation codes
are detailed in the instruction set table)
After the device is selected with CS going low, the first
byte will be received. The part is accessed via the SI pin,
with data being clocked in on the rising edge of SCK.
The first byte contains one of the six op-codes that define
Note:
(1) X=0 for 25010, 25020. X=A8 for 25040
(2) This parameter is tested initially and after a design or process change that affects the parameter.
(3) t
Doc. No. 1006, Rev. L
WREN
WRDI
RDSR
WRSR
READ
WRITE
Note: Dashed Line= mode (1, 1) – – – – –
SCK
SO
PUR
CS
SI
t
t
PUR
PUW
and t
V
V
V
V
V
V
V
IH
V IL
OH
OL
IL
IH
IL
IH
PUW
t
CSS
are the delays required from the time V
HI-Z
Power-up to Read Operation
Power-up to Write Operation
t
SU
0000 0110
0000 0100
0000 0101
0000 0001
0000 X011
0000 X010
VALID IN
t
WH
(1)
(1)
t
H
CC
is stable until the specified operation can be initiated.
4
t
WL
the operation to be performed.
SI is the serial data input pin. This pin is used to input all
opcodes, byte addresses, and data to be written to the
CAT25010/20/40. Input data is latched on the rising
edge of the serial clock for SPI modes (0, 0 & 1, 1).
SO is the serial data output pin. This pin is used to
transfer data out of the CAT25010/20/40. During a read
cycle, data is shifted out on the falling edge of the serial
Serial Input
t
V
Serial Output
t
t FI
RI
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
t
HO
1
1
t
CSH
t
DIS
HI-Z
ms
ms
t
CS

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