LMX2542LQ2121 NSC [National Semiconductor], LMX2542LQ2121 Datasheet - Page 14

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LMX2542LQ2121

Manufacturer Part Number
LMX2542LQ2121
Description
PLLatinum Cellular and GPS Frequency Synthesizer System with Integrated VCO
Manufacturer
NSC [National Semiconductor]
Datasheet
www.national.com
1.0 Functional Description
1.5 MICROWIRE SERIAL INTERFACE
The programmable register set is accessed via the MI-
CROWIRE serial interface. The interface comprises three
signal pins: CLK, DATA, and LE. Serial data is clocked into
the 24-bit shift register on the rising edge of CLK. The least
significant bits decode the internal control register address.
FIGURE 2. Lock Detect Timing Diagram Waveform
(Continued)
14
When LE transitions from LOW to HIGH, DATA stored in the
shift registers is loaded into one of six control registers. The
MSB of DATA is loaded in first. The synthesizers can be
programmed even in power down mode. A complete pro-
gramming description is provided in Section 2.0.
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