CY7C1355C-100BZC CYPRESS [Cypress Semiconductor], CY7C1355C-100BZC Datasheet - Page 9

• Manufacturer Part Number: CY7C1355C-100BZC
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05688 Rev. *D
AC Test Loads and Waveforms
Capacitance
Thermal Resistance
Switching Characteristics
C
C
C
Θ
Θ
t
Clock
t
t
t
Output Times
t
t
t
t
t
t
t
Notes:
11. Tested initially and after any design or process changes that may affect these parameters.
12. Timing reference level is 1.5V when V
13. Test conditions shown in (a) of AC Test Loads, unless otherwise noted.
14. This part has a voltage regulator internally; t
15. t
16. At any given voltage and temperature, t
17. This parameter is sampled and not 100% tested.
POWER
CYC
CH
CL
CDV
DOH
CLZ
CHZ
OEV
OELZ
OEHZ
3.3V I/O Test Load
OUTPUT
IN
CLOCK
I/O
JA
JC
Parameter
can be initiated.
data bus. These specifications do not imply a bus contention condition, but reflect parameters guaranteed over worst case user conditions. Device is designed
to achieve High-Z prior to Low-Z under the same system conditions.
Parameters
CHZ
Parameter
, t
CLZ
,t
OELZ
, and t
Z
[11]
Input Capacitance
Clock Input Capacitance
I/O Capacitance
0
= 50Ω
OEHZ
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
V
Clock Cycle Time
Clock HIGH
Clock LOW
Data Output Valid after CLK Rise
Data Output Hold after CLK Rise
Clock to Low-Z
Clock to High-Z
OE LOW to Output Valid
OE LOW to Output Low-Z
OE HIGH to Output High-Z
DD
Description
(Typical) to the First Access
are specified with AC test conditions shown in part (b) of AC Test Loads. Transition is measured ± 200 mV from steady-state voltage.
(a)
V
[11]
Description
L
= 1.5V
R
DDQ
L
OEHZ
= 50Ω
Over the Operating Range
[15, 16, 17]
=3.3V.
[15, 16, 17]
POWER
is less than t
OUTPUT
3.3V
is the time that the power needs to be supplied above V
INCLUDING
Description
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA/JESD51
JIG AND
[15, 16, 17]
SCOPE
[15, 16, 17]
T
OELZ
A
Test Conditions
5 pF
= 25°C, f = 1 MHz,
[14]
and t
V
V
DD
DDQ
CHZ
Test Conditions
= 3.3V
=3.3V
(b)
is less than t
R = 317Ω
[12, 13, 14, 15, 16, 17]
R = 351Ω
CLZ
to eliminate bus contention between SRAMs when sharing the same
GND
100 TQFP
V
DD
Max.
≤ 1 ns
5
5
5
Min.
7.5
3.0
3.0
2.0
DD
1
0
0
10%
(minimum) initially, before a read or write operation
–133
100 TQFP
Package
29.41
Max.
6.13
ALL INPUT PULSES
6.5
3.5
3.5
3.5
90%
165 FBGA
Min.
10.0
4.0
4.0
2.0
Max.
(c)
1
0
0
7
7
7
165 FBGA
Package
–100
CY7C1379C
16.8
3.0
Max.
7.5
3.5
3.5
3.5
Page 9 of 15
90%
10%
Unit
≤ 1 ns
pF
pF
pF
°C/W
°C/W
Unit
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns