CY7C1355C-100AXI CYPRESS [Cypress Semiconductor], CY7C1355C-100AXI Datasheet - Page 15

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CY7C1355C-100AXI

Manufacturer Part Number
CY7C1355C-100AXI
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document #: 38-05539 Rev. *E
Scan Register Sizes
Identification Codes
Instruction
Bypass
ID
Boundary Scan Order (119-ball BGA package)
Boundary Scan Order (165-ball FBGA package)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Code
000
001
010
011
100
101
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state. This instruction is not 1149.1 compliant.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation. This instruction does not implement 1149.1 preload
function and is therefore not 1149.1 compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Bit Size (x36)
32
69
69
3
1
Description
Bit Size (x18)
CY7C1355C
CY7C1357C
32
69
69
3
1
Page 15 of 28
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