IS62C1024 ICSI [Integrated Circuit Solution Inc], IS62C1024 Datasheet - Page 7

• Manufacturer Part Number: IS62C1024
• Description: 128K x 8 HIGH-SPEED CMOS STATIC RAM
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

IS62C1024
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
2. I/O will assume the High-Z state if OE = V
Integrated Circuit Solution Inc.
SR016-0B
WRITE CYCLE NO. 2 (CE1
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
ADDRESS
D
OUT
WE
D
OE
CE
IN
LOW
t
SA
DATA UNDEFINED
CE1
CE1
CE1
CE1, CE2 Controlled)
IH
.
VALID ADDRESS
t
t
AW
HZWE
t
t
(1,2)
PWE1
WC
HIGH-Z
t
SD
DATA
IN
VALID
t
HD
t
LZWE
t
HA
7