IS61C632A ICSI [Integrated Circuit Solution Inc], IS61C632A Datasheet - Page 14

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IS61C632A

Manufacturer Part Number
IS61C632A
Description
32K x 32 SYNCHRONOUS PIPELINED STATIC RAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet

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IS61C632A
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS
Notes:
1. The assertion of ZZ allows the SRAM to enter a lower power state than when deselected within the time specified. Data
2. ADSC and ADSP must not be asserted for at least 2 cyc after leaving ZZ state.
3. Configuration signal MODE is static and must not change during normal operation.
4. Guaranteed but not 100% tested. This parameter is periodically sampled.
5. Tested with the load in Figure 2.
14
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
KC
KH
KL
KQ
KQX
KQLZ
KQHZ
OEQ
OEQX
OELZ
OEHZ
AS
SS
CES
AH
SH
CEH
ZZS
ZZREC
CFG
retention is guaranteed when ZZ is asserted and clock remains active.
(4)
(4,5)
(4,5)
(4,5)
(4,5)
(4)
Cycle Time
Clock High Time
Clock Low Time
Clock Access Time
Clock High to Output Invalid
Clock High to Output Low-Z
Clock High to Output High-Z
Output Enable to Output Valid
Output Disable to Output Invalid
Output Enable to Output Low-Z
Output Disable to Output High-Z
Address Setup Time
Address Status Setup Time
Chip Enable Setup Time
Address Hold Time
Address Status Hold Time
Chip Enable Hold Time
ZZ Standby
ZZ Recovery
Configuration Setup
(1)
(2)
(3)
Min. Max.
1.5
1.5
2.5
2.5
2.5
0.5
0.5
0.5
25
8
4
4
0
0
0
2
2
-4
4.5
4.5
4
4
Min. Max.
1.5
1.5
2.5
2.5
2.5
0.5
0.5
0.5
10
35
4
4
0
0
0
2
2
-5
4.8
5
5
5
Min. Max.
2.5
2.5
2.5
0.5
0.5
0.5
12
45
4
4
2
0
2
0
0
2
2
-6
6
6
6
6
Integrated Circuit Solution Inc.
Min. Max.
2.5
2.5
2.5
0.5
0.5
0.5
(Over Operating Range)
13
52
6
6
2
0
2
0
0
2
2
-7
7
6
6
6
Min. Max. Unit
2.5
2.5
2.5
0.5
0.5
0.5
15
60
6
6
2
0
2
0
0
2
2
-8
8
6
6
6
SSR001-0B
cyc
cyc
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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