M29F002BT STMICROELECTRONICS [STMicroelectronics], M29F002BT Datasheet - Page 5

no-image

M29F002BT

Manufacturer Part Number
M29F002BT
Description
2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M29F002BT
Manufacturer:
ST
0
Part Number:
M29F002BT-120K1
Manufacturer:
ST
Quantity:
1 831
Part Number:
M29F002BT-120K1
Manufacturer:
ST
0
Part Number:
M29F002BT-120K1
Manufacturer:
ST
Quantity:
20 000
Part Number:
M29F002BT-120KI/90/70/45
Manufacturer:
ST
0
Part Number:
M29F002BT-12K1
Manufacturer:
ST
0
Part Number:
M29F002BT-45K
Manufacturer:
ST
0
Part Number:
M29F002BT-45K1
Manufacturer:
ST
Quantity:
20 000
Part Number:
M29F002BT-45N1
Manufacturer:
ST
Quantity:
12 388
Part Number:
M29F002BT-70K1
Manufacturer:
ST
Quantity:
8
Part Number:
M29F002BT-70K1
Manufacturer:
ST
Quantity:
1 831
Part Number:
M29F002BT-70K1
Manufacturer:
ST
Quantity:
20 000
Part Number:
M29F002BT-70K6
Manufacturer:
ST
Quantity:
12
BUS OPERATIONS
There are five standard bus operations that control
the device. These are Bus Read, Bus Write, Out-
put Disable, Standby and Automatic Standby. See
Table 5, Bus Operations, for a summary. Typically
glitches of less than 5ns on Chip Enable or Write
Enable are ignored by the memory and do not af-
fect bus operations.
Bus Read. Bus Read operations read from the
memory cells, or specific registers in the Com-
mand Interface. A valid Bus Read operation in-
volves setting the desired address on the Address
Inputs, applying a Low signal, V
and Output Enable and keeping Write Enable
High, V
value, see Figure 9, Read Mode AC Waveforms,
and Table 12, Read AC Characteristics, for details
of when the output becomes valid.
Bus Write. Bus Write operations write to the
Command Interface. A valid Bus Write operation
begins by setting the desired address on the Ad-
dress Inputs. The Address Inputs are latched by
the Command Interface on the falling edge of Chip
Enable or Write Enable, whichever occurs last.
The Data Inputs/Outputs are latched by the Com-
mand Interface on the rising edge of Chip Enable
or Write Enable, whichever occurs first. Output En-
able must remain High, V
Write operation. See Figures 10 and 11, Write AC
Waveforms, and Tables 13 and 14, Write AC
Characteristics, for details of the timing require-
ments.
Output Disable. The Data Inputs/Outputs are in
the high impedance state when Output Enable is
High, V
Standby. When Chip Enable is High, V
Data Inputs/Outputs pins are placed in the high-
impedance state and the Supply Current is re-
duced to the Standby level.
Table 5. Bus Operations
Note: X = V
Bus Read
Bus Write
Output Disable
Standby
Read Manufacturer
Code
Read Device Code
Operation
IH
IH
IL
. The Data Inputs/Outputs will output the
.
or V
IH
.
IH
V
, during the whole Bus
V
V
V
V
E
X
IH
IL
IL
IL
IL
IL
, to Chip Enable
V
V
V
V
V
G
X
IH
IH
M29F002BT, M29F002BB, M29F002BNT, M29F002BNB
IL
IL
IL
IH
, the
V
V
V
V
V
W
X
IH
IH
IH
IH
IL
When Chip Enable is at V
reduced to the TTL Standby Supply Current, I
To further reduce the Supply Current to the CMOS
Standby Supply Current, I
be held within V
levels see Table 11, DC Characteristics.
During program or erase operations the memory
will continue to use the Program/Erase Supply
Current, I
til the operation completes.
Automatic Standby. If CMOS levels (V
are used to drive the bus and the bus is inactive for
150ns or more the memory enters Automatic
Standby where the internal Supply Current is re-
duced to the CMOS Standby Supply Current, I
The Data Inputs/Outputs will still output data if a
Bus Read operation is in progress.
Special Bus Operations
Additional bus operations can be performed to
read the Electronic Signature and also to apply
and remove Block Protection. These bus opera-
tions are intended for use by programming equip-
ment and are not usually used in applications.
They require V
Electronic Signature. The memory has two
codes, the manufacturer code and the device
code, that can be read to identify the memory.
These codes can be read by applying the signals
listed in Table 5, Bus Operations.
Block Protection and Blocks Unprotection. Each
block can be separately protected against acci-
dental Program or Erase. Protected blocks can be
unprotected to allow data to be changed.
There are two methods available for protecting
and unprotecting the blocks, one for use on pro-
gramming equipment and the other for in-system
use. For further information refer to Application
Note AN1122, Applying Protection and Unprotec-
tion to M29 Series Flash.
Cell Address
Command Address
X
X
A0 = V
Others V
A0 = V
Others V
Address Inputs
IL
IH
, A1 = V
, A1 = V
CC4
IL
IL
or V
or V
, for Program or Erase operations un-
ID
IH
IH
IL
IL
CC
to be applied to some pins.
, A9 = V
, A9 = V
± 0.2V. For Standby current
ID
ID
CC3
,
IH
,
the Supply Current is
, Chip Enable should
B0h (M29F002BNT)
B0h (M29F002BT)
34h (M29F002BB)
Inputs/Outputs
Data Output
Data Input
Data
Hi-Z
Hi-Z
20h
CC
± 0.2V)
CC2
CC3
5/22
.
.

Related parts for M29F002BT