ICS1893CK ICST [Integrated Circuit Systems], ICS1893CK Datasheet - Page 115

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ICS1893CK

Manufacturer Part Number
ICS1893CK
Description
3.3-V 10Base-T/100Base-TX Integrated PHYceive
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet

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9.5.13 100M MII Media Independent Interface: Receive Latency
ICS1893CF, Rev. F, 03/01/07
TP_RX
RXCLK
RXD
Table 9-20
time periods consist of timings of signals on the following pins:
Figure 9-14
Table 9-20. 100M MII / 100M Stream Interface Receive Latency Timing
Figure 9-14. 100M MII / 100M Stream Interface: Receive Latency Timing Diagram
Period
unscrambled.
Time
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
Shown
t1
ICS1893CF Data Sheet Rev. F - Release
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
shows the timing diagram for the time periods.
Parameter
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
115
t1
Conditions
Chapter 9 DC and AC Operating Conditions
Min. Typ. Max.
16
17
Bit times
Mar. 2007
Units

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