CY7C0241 CYPRESS [Cypress Semiconductor], CY7C0241 Datasheet - Page 8
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CY7C0241
Manufacturer Part Number
CY7C0241
Description
4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C0241.pdf
(21 pages)
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Document #: 38-06035 Rev. *C
Electrical Characteristics
Capacitance
AC Test Loads and Waveforms
OUTPUT
I
I
I
I
I
C
C
CC
SB1
SB2
SB3
SB4
Parameter
OUTPUT
Note:
12. Tested initially and after any design or process changes that may affect these parameters.
IN
OUT
C = 30 pF
(a) Normal Load (Load 1)
Parameter
Load (Load 2)
Operating Current
Standby Current
(Both Ports TTL Levels)
Standby Current
(One Port TTL Level)
Standby Current
(Both Ports CMOS
Levels)
Standby Current
(Both Ports CMOS
Levels)
[12]
C = 30 pF
Description
5V
R1 = 893Ω
R2 = 347Ω
Input Capacitance
Output Capacitance
Over the Operating Range (continued)
Description
GND
3.0V
V
Outputs Disabled
CE
f = f
CE
f = f
Both Ports CE and CE
V
or V
One Port CE
CE
V
Active Port Outputs, f = f
CC
IN
CC
R
L
L
≤
≥ V
IN
MAX
MAX
– 0.2V, V
OUTPUT
= Max., I
and CE
or CE
≥ V
3 ns
(b) Thévenin Equivalent (Load 1)
≤ 0.2V, f = 0
CC
10%
[11]
[11]
CC
C = 30pF
– 0.2V or V
R
– 0.2V,
Test Conditions
R
≥ V
IN
L
ALL INPUT PULSES
OUT
or
≥ V
≥ V
IH
90%
[11]
T
V
IH
,
= 0 mA,
CC
A
CC
,
IN
= 25
R
– 0.2V
R
= 5.0V
TH
MAX
≤ 0.2V,
≥
×
= 250Ω
Test Conditions
[11]
C, f = 1 MHz,
Com’l
Ind
Com’l
Ind
Com’l
Ind
Com’l
Ind
Com’l
Ind
90%
V
TH
10%
= 1.4V
≤
Min. Typ. Max. Min. Typ. Max.
3 ns
7C024/0241–35
7C025/0251–35
OUTPUT
160
160
30
30
85
85
80
80
3
3
(c) Three-State Delay (Load 3)
C = 5 pF
230
260
135
150
120
135
50
65
15
15
Max.
10
10
CY7C024/0241
CY7C025/0251
7C024/0241–55
7C025/0251–55
150
150
20
20
75
75
70
70
3
3
5V
Page 8 of 21
R1 = 893Ω
R2 = 347Ω
230
260
135
150
120
135
Unit
50
65
15
15
pF
pF
Unit
mA
mA
mA
mA
mA