CY7C006-15JC CYPRESS [Cypress Semiconductor], CY7C006-15JC Datasheet - Page 3

• Manufacturer Part Number: CY7C006-15JC
• Description: 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
• Manufacturer: CYPRESS [Cypress Semiconductor]

Pin Configurations
Pin Definitions
I/O
A
CE
OE
R/W
SEM
INT
BUSY
M/S
V
GND
0L–13L
CC
0L–7L(8L)
L
L
L
L
L
L
Left Port
(continued)
I/O
A
CE
OE
R/W
SEM
INT
BUSY
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
GND
0R–13R
V
V
NC
NC
NC
CC
CC
0R–7R(8R)
0R
1R
2R
3R
4R
5R
6R
R
R
2L
3L
4L
5L
6L
7L
R
R
R
R
Right Port
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Data Bus Input/Output
Address Lines
Chip Enable
Output Enable
Read/Write Enable
Semaphore Enable. When asserted LOW, allows access to eight sema-
phores. The three least significant bits of the address lines will determine
which semaphore to write or read. The I/O
semaphore. Semaphores are requested by writing a 0 into the respective
location.
Interrupt Flag. INT
cleared when left port reads location 3FFE. INT
location 3FFF and is cleared when right port reads location 3FFF.
Busy Flag
Master or Slave Select
Power
Ground
80-Pin TQFP
Top View
CY7C016
3
L
is set when right port writes location 3FFE and is
Description
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
A
A
A
A
A
A
INT
BUSY
GND
M/S
A
A
A
A
A
NC
BUSY
INT
NC
NC
5L
4L
3L
2L
1L
0L
0R
1R
2R
3R
4R
C006-4
L
R
L
R
0
pin is used when writing to a
R
is set when left port writes
CY7C006
CY7C016