CY7C006-15JC CYPRESS [Cypress Semiconductor], CY7C006-15JC Datasheet - Page 14

• Manufacturer Part Number: CY7C006-15JC
• Description: 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
• Manufacturer: CYPRESS [Cypress Semiconductor]

Semaphores are accessed by asserting SEM LOW. The SEM
pin functions as a chip enable for the semaphore latches (CE must
remain HIGH during SEM LOW). A
address. OE and R/W are used in the same manner as a normal
memory access.When writing or reading a semaphore, the other ad-
dress pins have no effect.
When writing to the semaphore, only I/O
to the left port of an unused semaphore, a 1 will appear at the same
semaphore address on the right port. That semaphore can now only
be modified by the side showing 0 (the left port in this case). If the left
port now relinquishes control by writing a 1 to the semaphore, the
semaphore will be set to 1 for both sides. However, if the right port had
requested the semaphore (written a 0) while the left port had control,
Table 3. Semaphore Operation Example
Ordering Information
16K x8 Dual-Port SRAM
No action
Left port writes semaphore
Right port writes 0 to semaphore
Left port writes 1 to semaphore
Left port writes 0 to semaphore
Right port writes 1 to semaphore
Left port writes 1 to semaphore
Right port writes 0 to semaphore
Right port writes 1 to semaphore
Left port writes 0 to semaphore
Left port writes 1 to semaphore
Speed
(ns)
15
25
35
55
CY7C006-15AC
CY7C006-15JC
CY7C006-25AC
CY7C006-25JC
CY7C006-25AI
CY7C006-25JI
CY7C006-35AC
CY7C006-35JC
CY7C006-35AI
CY7C006-35JI
CY7C006-55AC
CY7C006-55JC
CY7C006-55AI
CY7C006-55JI
Function
Ordering Code
0–2
represents the semaphore
0
is used. If a 0 is written
Package
Name
A65
A65
A65
A65
A65
A65
A65
I/O
J81
J81
J81
J81
J81
J81
J81
0-7/8
1
0
0
1
1
0
1
1
1
0
1
Left
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
64-Lead Thin Quad Flat Package
68-Lead Plastic Leaded Chip Carrier
14
I/O
the right port would immediately own the semaphore as soon as the
left port released it. Table 3 shows sample semaphore operations.
When reading a semaphore, all eight data lines output the
semaphore value. The read value is latched in an output reg-
ister to prevent the semaphore from changing state during a
write from the other port. If both ports attempt to access the
semaphore within t
be obtained by one side or the other, but there is no guarantee which
side will control the semaphore.
Initialization of the semaphore is not automatic and must be
reset during initialization program at power-up. All Sema-
phores on both sides should have a one written into them at
initialization from both sides to assure that they will be free
when needed.
0-7/8
1
1
1
0
0
1
1
0
1
1
1
Right
Package Type
Semaphore free
Left port obtains semaphore
Right side is denied access
Right port is granted access to semaphore
No change. Left port is denied access
Left port obtains semaphore
No port accessing semaphore address
Right port obtains semaphore
No port accessing semaphore
Left port obtains semaphore
No port accessing semaphore
SPS
of each other, the semaphore will definitely
Status
CY7C006
CY7C016
Commercial
Commercial
Industrial
Commercial
Industrial
Commercial
Industrial
Operating
Range