SCA21X0 VTI [VTI technologies], SCA21X0 Datasheet - Page 32

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SCA21X0

Manufacturer Part Number
SCA21X0
Description
VTI Automotive Digital Accelerometer Platform
Manufacturer
VTI [VTI technologies]
Datasheet
6.6 Recommended PWB layout
VTI Technologies Oy
www.vti.fi
Figure 9: Recommended circuit diagram
Recommended PWB layout for all product family components with SPI interface is shown in Figure
10 and Figure 11. Following design rules and recommendations should be considered:
VDD
Note 1
L1
6
Required:
1
2
3
4
5
6
Recommended:
7
8
9
10 Do not route digital signals under the component on 2nd layer
MISO
CSB
To achieve high EMC DPI performance, add serial inductance (L1) to VDD line
before serial resistance (for example Murata: BLM18HG102S)
Connect (C4) 100 nF SMD capacitor between AVDD and AVSS right next to
component pins AVDD and AVSS
Connect (C5) 100 nF SMD capacitor between DVDD and DVSS right next to
component pins DVDD and DVSS
Use separate ground levels AVSS and DVSS under and near the component
but connect them together on the PCB, see Figure 10
Locate ground plate under component
Do not route signals or power supplies under the component on top layer
Ensure good ground connection of Egnd (pin12) to AVSS
Locate digital ground under digital signal lines
Do not route digital signals one upon the other for long distance
Avoid crossing of AVDD path with digital signal especially between serial
resistance R1 and AVDD pin
10 Ω
R1
Specified operation voltage (VDD) range 3.05...3.6 V
C6
Doc. Nr. 82 694 00 C
10 µF
C4
100 nF
1
2
3
4
5
6
NC
NC
AVSS
AVDD
CSB
MISO
SCA21x0
SCA3100
SCA8x0
EGND
DVDD
DVSS
MOSI
PWM
SCK
12
11
10
9
8
7
100 nF
C5
SCA8X0/21X0/3100 Series
MOSI
SCK
32/35

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