LTC4110EUHF LINER [Linear Technology], LTC4110EUHF Datasheet - Page 24

• Manufacturer Part Number: LTC4110EUHF
• Description: Battery Backup System Manager
• Manufacturer: LINER [Linear Technology]

LTC4110
OPERATION
The micropower shutdown state will be maintained if the
DCIN supply is removed and suffi cient battery voltage is
present (V
by the UVLO (see V
SHDN pin, the shutdown state is automatically cancelled.
Register reset state is cancelled until DCIN is reapplied as
determined by the DCDIV pin.
In shutdown; charge, calibration and backup modes are
inhibited, all registers are set to their default states (with
exception of the backup fault bit register), the internal
timer is reset and oscillator disabled, the status pins;
ACPb, GPIO1, GPIO2 and GPIO3 are a high impedance
and the LTC4110 is put into a micropower state. While
in shutdown the SMBus is disabled and the SDA and
SCL pins are high impedance. In addition, the shutdown
state will disconnect loads from the battery to prevent its
discharge as follows:
• The BATID pin is forced to the battery voltage to turn
• The CHGFET and DCHFET pins are forced to GND to
• Current into the BAT pin is minimized. Also the V
While in shutdown, the LTC4110 will draw a small current
from battery (I
pin is open an internal weak pull-up current (I
pin voltage up thereby entering the shutdown state.
PWM OPERATION
A conceptual diagram of the LTC4110 PWM engine is
shown in Figure 9.
24
off the battery P-MOSFETs for isolation of the load from
the battery
turn off the fl yback switcher N-MOSFETs
V
REF
pin voltages will fall to zero.
BAT
≥ 2.7V). When DCIN is reapplied as detected
BSD
Figure 8. Shutdown Control Input
SHDN
) if the DCIN supply is absent. If the SHDN
UVI
), regardless of the level of the
5V
I
ISD
SHUTDOWN
LTC4110
4110 F08
ISD
) pulls the
DD
and
The voltage across the external current programming
resistor R
nected to the CSP and CSN pins and then amplifi ed by a
ratio of R
compared with the bandgap reference through the cur-
rent loop error amplifi er to adjust the I
the current comparator threshold to maintain a constant
charging current. Once the battery voltage rises to close
to the programmed fl oat voltage, the voltage loop error
amplifi er gradually pulls the I
ing current and maintain a constant voltage charging.
C/x CHARGE TERMINATION
LTC4110 monitors the charging current through the volt-
age on the I
the bulk charging current, an internal C/x comparator is
tripped, and the LTC4110 will enter top-off charge stage
if standard Li-Ion battery mode is selected or release the
GPI01 pin if no-host SLA battery mode is selected. The
actual x value depends on the programmed charging cur-
rent and the C rate of the battery.
V
SNS
+
–
x
+
–
R
=
R
R
SNS(BAT)
CSP1
CSN1
I
CHG
+
+
C
ICHG
SNS(BAT)
R
R
CSP2
CSN2
CHG
• 5
/(R
CSP
CSN
BAT
Figure 9. LTC4110 PWM Engine
pin, once the current drops below 20% of
CSP1
is averaged by the RC network con-
V
FB
+
–
+ R
AMPLIFIER
+
–
CURRENT
CSP2
INPUT
–
+
TH
VOLTAGE
LOOP EA
ADJUSTED BY
REFERENCE
VOLTAGE
V
). This amplifi ed voltage is
CHG
pin low, reduces the charg-
PIN
V
R
ICHG
ICHG
I
TH
/(R
+
=
TH
CSP1
CURRENT
BANDGAP
LOOP EA
+ R
pin which sets
CSP2
–
+
)*V
SNS
+
–
4110 F09
I
R
CHG
ICHG
4110fa