XE3005 ETC, XE3005 Datasheet - Page 6

• Manufacturer Part Number: XE3005
• Description: (XE3005 / XE3006) Low-Power Audio CODEC
• Manufacturer: ETC

2.1.3
The DAC is based on a multi bit sigma-delta modulator, which operates at a frequency of 8 times the sampling
rate. The outputs of the modulator are 2’s complement words of 6 bit. A pulse-width modulator (PWM) converts
the 6 bit words into 2 single bit streams at 256 times the sampling frequency. Finally the 2 bit streams are
supplied to the power amplifier. The Power Amplifier is a Class D amplifier, which offers higher efficiency than the
traditional Class AB topologies. It uses a three-state unbalanced PWM. This means that both channels of the PA
(AOUTP and AOUTN) will not switch at the same time, therefore the outputs are not purely differential (see figure
5 and 6)
Figure 6 shows the relation of input and output samples of the PWM (The timing diagram is not to scale in the
time-axis).
The DAC receives 16-bit wide 2’s complement format through the Serial Audio Interface. The protocol can be
selected through register J. The complete DAC and PA amplifier chain can be powered-down through register I.
6
-VDDPA
VDDPA
VSSPA
1
0
1
0
DAC Signal Channel
From Serial Audio
Interface
1/(256 x Fsync)
pwm_in(5:0) = 1
dac_in(15:0)
@ Fsync
Interpolator
Modulator
Figure 6: examples PWM in and out (not to scale)
pwm_in(5:0) = -1
&
1/(256 x Fsync)
1/(8 x Fsync)
Figure 5: DAC block diagram
pwm_in(5:0)
@ 8xFsync
Pulse Width
Modulator
pwm_in(5:0) = 0
@ 256xFsync
bit streams
P
N
pwm_in(5:0) = 2
2/(256 x Fsync)
P
P
s
Amplifier
VDDPA
XE3005/6
VSSPA
Power
Data Sheet
XE3005/XE3006
s = 1 s = 0
OUTP-OUTN
N
N
D0212-116
P
N
AOUTN
AOUTP