UPD70208HGF-16-3B9 NEC, UPD70208HGF-16-3B9 Datasheet - Page 28
UPD70208HGF-16-3B9
Manufacturer Part Number
UPD70208HGF-16-3B9
Description
V40HLTM/ V50HLTM 16/8/ 16-BIT MICROPROCESSOR
Manufacturer
NEC
Datasheet
1.UPD70208HGF-16-3B9.pdf
(110 pages)
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7.2
combination. The number of wait cycles specified by the WCU set value or the number of wait cycles under READY control,
whichever is larger, is inserted.
Remark The division specification and the size of each block are set by means of a system I/O area register.
When wait cycles exceeding 3 clock cycles are necessary, the WCU and the READY signal pin can be used in
RELATION BETWEEN WCU AND READY PIN
READY
Figure 7-2. Example of I/O Space Division
64K-Byte I/O Area
Figure 7-3. WCU and READY Control
WCU
Data Sheet U13225EJ4V0DS00
FFFFH
0000H
Upper I/O Block
Middle I/O Block
Lower I/O Block
Bus Control
V40HL/V50HL
PD70208H, 70216H
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