MC68HC11KA Motorola, MC68HC11KA Datasheet - Page 43

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MC68HC11KA

Manufacturer Part Number
MC68HC11KA
Description
8-Bit Microcontroller
Manufacturer
Motorola
Datasheet

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FE — Framing Error
PF — Parity Error Flag
Bits [7:1] — Not implemented
RAF — Receiver Active Flag (Read only)
SCDRH/L —SCI Data Register High/Low
R8 — Receiver Bit 8
T8 — Transmitter Bit 8
Bits [5:0] — Not implemented
R/T[7:0] — Receiver/Transmitter Data Bits [7:0]
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FE is set when a zero is detected where a stop bit was expected. Clear the FE flag by reading SCSR1
with FE set and then reading SCDR.
PF is set if received data has incorrect parity. Clear PF by reading SCSR1 with PE set and then reading
SCDR.
Always read zero
Ninth serial data bit received when SCI is configured for a nine data bit operation.
Ninth serial data bit transmitted when SCI is configured for a nine data bit operation.
Always read zero
SCI data is double buffered in both directions.
SCSR2 —SCI Status Register 2
RESET:
0 = Stop bit detected
1 = Zero detected
0 = Parity correct
1 = Incorrect parity detected
0 = A character is not being received
1 = A character is being received
R7/T7
Bit 7
R8
Bit 7
0
R6/T6
T8
6
0
6
R5/T5
5
5
0
R4/T4
4
4
0
R3/T3
3
3
0
R2/T2
2
2
0
R1/T1
1
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R0/T0
1
0
Bit 0
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SCDRH (High)
SCDRL (Low)
Bit 0
RAF
MOTOROLA
0
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