X9241A Xicor, X9241A Datasheet - Page 11

• Manufacturer Part Number: X9241A
• Description: Quad Digitally Controlled Potentiometer (XDCP)
• Manufacturer: Xicor

X9241A
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Notes: (1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER-UP REQUIREMENTS (Power Up sequencing can affect correct recall of the wiper registers)
The preferred power-on sequence is as follows: First Vcc, then the potentiometer pins. It is suggested that Vcc
reach 90% of its final value before power is applied to the potentiometer pins. The Vcc ramp rate specification
should be met, and any glitches or slope changes in the Vcc line should be held to <100mV if possible. Also, Vcc
should not reverse polarity by more than 0.5V.
Notes: (5) This parameter is guaranteed by characterization or sample testing.
REV 1.1.13 12/09/02
Symbol
V
Symbol
Symbol
l
I
I
V
V
t
CC
I
t
SB
LO
t
C
PUW
OL
LI
C
PUR
R
IH
IL
I/O
V
IN
(2) Relative Linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a poten-
(3) MI = RTOT/63 or (R
(4) Max. = all four arrays cascaded together, Typical = individual array resolutions.
(6) t
(7) This parameter is guaranteed by design.
(8) Maximum Wiper Current is derated over temperature. See the Wiper Current Derating Curve.
(9) Ti value denotes the maximum noise glitch pulse width that the device will ignore on either SCL or SDA pins. Any noise glitch pulse
CC
Minimum endurance
(5)
(5)
(6)
(6)
as a potentiometer.
tiometer. It is a measure of the error in step size.
are guaranteed by design.
width that is greater than this maximum value will be considered as a valid clock or data pulse and may cause communication failure
to the device.
PUR
Data retention
Supply current (active)
V
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
Parameter
CC
and t
Power-up to initiation of read operation
Power-up to initiation of write operation
V
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3 and SCL)
current (standby)
CC
Parameter
PUW
Power up ramp rate
are the delays required from the time V
H
–R
L
)/63, single pot
Parameter
Parameter
Min.
–1
2
100,000
Min.
100
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Limits
Typ.
200
CC
is stable until the specified operation can be initiated. These parameters
V
Max.
CC
500
0.8
0.4
10
10
3
+ 1
Min.
0.2
Max.
19
12
Data changes per bit per register
Unit
mA
µA
µA
µA
V
V
V
Typ.
Characteristics subject to change without notice.
Unit
f
Other Inputs = V
SCL = SDA = V
V
V
I
pF
pF
SCL
OL
Years
IN
OUT
Unit
= 3mA
= V
= 100kHz, SDA = Open,
Max.
= V
50
SS
1
5
Test Condition
SS
to V
to V
Test Condition
CC
CC
SS
V
CC
V
I/O
IN
, Addr. = V
V/msec
= 0V
= 0V
Unit
ms
ms
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SS