UPC1830GT NEC, UPC1830GT Datasheet - Page 19

• Manufacturer Part Number: UPC1830GT
• Description: FILTER-CONTAINING VIDEO CHROMA/ SYNCHRONIZING SIGNAL PROCESSING LSI COMPATIBLE WITH NTSC/PAL SYSTEM
• Manufacturer: NEC

that C
of the horizontal sync. part, but disadvantageous for separation of the vertical sync. part. On the contrary,
increasing V
is necessary to optimize the constant in accordance with a signal input. As capacitance C
large value compared with the charge/discharge current. However, an excessive value may deteriorate the
excessive response characteristic, failing to catch up with drastic APL variations of the input signal.
electric field signal, etc.) a video signal may be confused with a sync. signal and sliced, making synchronization
unstable (abnormal).
(3) Vertical filter circuit
(4) Horizontal sync. detection circuit
(5) AFC detection circuit
(6) 32f
V
V
The PC1830 amplifies the part lower than this slice voltage (V
To determine sync. separation sensitivity, change R
The larger R
Caution
Separates the vertical sync. signal from the sync. signal separated by the sync. separation circuit.
Detects the presence of a horizontal sync. signal and changes the AFC time constant.
Performs phase detection on an input sync. signal and f
Stops phase detection for 9H of the vertical blanking period.
Controls VCO according to the voltage output by the AFC detection circuit and generates 32f
S
S
in Figure 5-7 represents the slice voltage and can be expressed in the following expression if it is assumed
= 2.5
O
H
is sufficiently large, and both I
VCO
S
susceptible to APL variations. Therefore, when configuring the actual circuit, use a Sync Tip
clamp circuit in the stage prior to inputting to the emitter follower to stabilize the synchronization
peak potential and this will make the circuit more resistant to APL variations.
Since the measuring circuit uses capacitor coupling for input for ease of measurement, it is
(R
may cause a sync. failure (jitter) due to noise (spikes) of the horizontal sync. part. Therefore, it
X
, the larger the slice level becomes. However, with large R
X
/R
O
)
V
S
Charge by I
(T2/T1) [V]
T1 (4.7
SP
Figure 5-7. Sync. Separation Waveform
s)
X
and I
SP
are linear.
T2 (58.86
X
to set V
H
and outputs the phase difference in voltage.
Discharge by I
s)
S
. Decreasing V
S
) to perform sync. separation.
X
X
if the sync. signal level drops (weak
S
is advantageous for separation
O
, select a sufficiently
H
oscillation clocks.
PC1830
19