LTC3855 LINER [Linear Technology], LTC3855 Datasheet - Page 44

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LTC3855

Manufacturer Part Number
LTC3855
Description
Dual, Fast, Accurate Step-Down DC/DC Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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LTC3838
APPLICATIONS INFORMATION
• The path formed by the top and bottom N-channel
• Several smaller sized ceramic output capacitors, C
• The filter capacitor between the SENSE
• Keep small-signal components connected noise-sensi-
• Place the resistor feedback divider R
44
MOSFETs, and the C
leads and PCB trace. The (–) terminal of output capaci-
tors should be connected close to the (–) terminal of
C
to achieve an effect of Kevin (4-wire) connection to the
input ground so that the “chopped” switching current
will not flow through the path between the input ground
and the output ground, and cause common mode output
voltage ripple.
can be placed close to the sense resistors and before
the rest bulk output capacitors.
should always be as close as possible to these pins.
Ensure accurate current sensing with Kevin (4-wire)
connections to the soldering pads from underneath
the sense resistors or inductor. A pair of sense traces
should be routed together with minimum spacing.
R
on the noiseless output side, and its filter resistors
close to the SENSE
however, filter resistor should be placed close to the
inductor, and away from the SENSE
its terminal is the SW node.
tive pins (give priority to SENSE
V
side of the IC as close to their respective pins as pos-
sible. This minimizes the possibility of noise coupling
into these pins. If the LTC3838 can be placed on the
bottom side of a multilayer board, use ground planes
to isolate from the major power components on the top
side of the board, and prevent noise coupling to noise
sensitive components on the bottom side.
V
V
tapped from the resistor divider will not be disturbed by
IN
OUTSENSE1
OUTSENSE1
FB2
SENSE
, but away from the loop described above. This is
pin for Channel 2, so that the feedback voltage
, if used, should be connected to the inductor
+
, V
and V
FB2
, RT , ITH, V
OUTSENSE1
+
/SENSE
IN
capacitors should have short
RNG
+
pins. For DCR sensing,
/SENSE
pins for Channel 1, or
pins) on the left hand
+
+
FB1
/SENSE
and SENSE
, R
, V
OUTSENSE1
FB2
pins, as
close to
OUT
pins
+
,
/
• Place decoupling capacitors C
• Use sufficient isolation when routing a clock signal into
• Place the ceramic decoupling capacitor C
• Place the ceramic decoupling capacitor C
• Filter the V
• If vias have to be used, use immediate vias to connect
• Flood all unused areas on all layers with copper. Flooding
PCB Layout Debugging
Only after each controller is checked for its individual
performance should both controllers be turned on at the
same time. It is helpful to use a current probe to monitor
the current in the inductor while testing the circuit. Monitor
the output switching node (SW pin) to synchronize the
oscilloscope to the internal oscillator output CLKOUT, or
external clock if used. Probe the actual output voltage as
well. Check for proper performance over the operating
voltage and current range expected in the application.
The frequency of operation should be maintained over
the input voltage range. The phase should be maintained
noise sources. Route remote sense PCB traces (use a
pair of wires closely together for differential sensing in
Channel 1) directly to the terminals of output capacitors
for best output regulation.
SGND pins with short, direct trace connections.
the MODE/PLLIN pin or out of the CLKOUT pin, so that
the clock does not couple into sensitive pins.
the INTV
the IC.
to the IC, between the combined DRV
PGND.
Place the filter capacitor close to the V
components to the SGND and PGND planes of LTC3838.
Use multiple large vias for power components.
with copper will reduce the temperature rise of power
components. Connect the copper areas to DC rails only,
e.g., PGND.
CC
IN
pin and SGND and as close as possible to
input to the LTC3838 with an RC filter.
ITH2
next to the ITH and
IN
INTVCC
CC1,2
pin.
DRVCC
pins and
between
close
3838fa

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