LTC3855 LINER [Linear Technology], LTC3855 Datasheet - Page 29

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LTC3855

Manufacturer Part Number
LTC3855
Description
Dual, Fast, Accurate Step-Down DC/DC Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIONS INFORMATION
For applications where the main input power never exceeds
5.3V, tie the DRV
through a small resistor, (such as 1Ω to 2Ω) as shown
in Figure 8 to minimize the voltage drop caused by the
gate charge current. This will override the LDO and will
prevent DRV
voltage. Make sure the DRV
test voltage for the external MOSFET which is typically at
4.5V for logic-level devices.
Input Undervoltage Lockout (UVLO)
The LTC3838 has two functions that help protect the con-
troller in case of input undervoltage conditions. An internal
UVLO comparator constantly monitors the INTV
DRV
ent. The comparator enables internal UVLO signal, which
locks out the switching action of both channels, until the
INTV
UVLO thresholds. The rising threshold (to release UVLO)
of the INTV
(to re-enable UVLO). The UVLO thresholds for DR
lower than that of INTV
voltages of power MOSFETs, to prevent them from turning
on without sufficient gate drive voltages.
CC
CC
voltages to ensure that adequate voltages are pres-
and DR
CC
CC
LTC3838
is typically 4.2V, with 0.5V falling hysteresis
DRV
DRV
from dropping too low due to the dropout
Figure 8. Setup for V
VCC1,2
CC1
CC2
CC1
and DRV
CC
pins are all above their respective
but higher than typical threshold
CC
R
C
DRVCC
DRVCC
voltage exceeds the R
CC2
IN
pins to the V
≤ 5.3V
3838 F08
C
IN
V
IN
VCC1,2
IN
CC
DS(ON)
input
and
are
Generally for V
the V
pins from V
that both RUN pins have two levels of threshold voltages.
The precision gate-drive-enable threshold voltage of 1.2V
can be used to set a V
If resistor dividers are used on both RUN pins, when V
is low enough and both RUN pins are pulled below the
~0.8V threshold, the part will shut down all bias of INTV
and DRV
The RUN pins’ bias currents depend on the RUN voltages.
The bias current changes should be taken into account
when designing the external voltage divider UVLO circuit.
An internal proportional-to-absolute-temperature (PTAT)
pull-up current source (~1.2μA at 25°C) is constantly con-
nected to this pin. When a RUN pin rises above 1.2V, the
corresponding channel’s TG and BG drives are turned on
and an additional 5μA temperature-independent pull-up
current is connected internally to the RUN pin. Pulling the
RUN pin to fall below 1.2V by more than an 80mV hyster-
esis turns off TG and BG of the corresponding channel,
and the additional 5μA pull-up current is disconnected.
As voltage on a RUN pin increases, typically beyond 3V,
its bias current will start to reverse direction and flow into
the RUN pin. Keep in mind that neither of the RUN pins
can sink more than 50μA; Even if a RUN pin may slightly
exceed 6V when sinking 50μA, a RUN pin should never
be forced to higher than 6V by a low impedance voltage
source to prevent faulty conditions.
Soft-Start and Tracking
The LTC3838 has the ability to either soft-start by itself
with a capacitor or track the output of another channel or
an external supply. Note that the soft-start and tracking
features are achieved not by limiting the maximum output
current of the controller, but by controlling the output ramp
voltage according to the ramp rate on the TRACK/SS pin.
IN
supply by using external voltage dividers at the RUN
CC
IN
and be put in micropower shutdown mode.
to SGND. To design the voltage divider, note
IN
> 6V, a UVLO can be set through monitoring
IN
to turn on a channel’s switching.
LTC3838
29
3838fa
CC
IN

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