LTC3855 LINER [Linear Technology], LTC3855 Datasheet - Page 11

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LTC3855

Manufacturer Part Number
LTC3855
Description
Dual, Fast, Accurate Step-Down DC/DC Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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PIN FUNCTIONS
V
Amplifier (–) Input of Channel 1. Connect this pin to the
negative terminal of the output load capacitor of V
SENSE1
Current Sense Comparator (+) Inputs. The ITH pin voltage
and controlled offsets between the SENSE
pins set the current trip threshold. The comparator can
be used for R
R
to the (+) terminal of R
SENSE
capacitor and sense resistor tied across the inductor.
SENSE1
Current Sense Comparator (–) Input. The comparator can
be used for R
For R
pin to the (–) terminal of R
the SENSE
inductor V
tion as output voltage sense pins for the top MOSFET
on-time adjustment. The impedance looking into these
pins is different from the SENSE
is an additional 500k internal resistor from each of the
SENSE
DTR1, DTR2 (Pins 16, 35/Pins 20, 1): Detect Load-
Release Transient for Overshoot Reduction. When load
current suddenly drops, if voltage on this DTR pin drops
below half of INTV
off, allowing the inductor current to drop to zero faster,
thus reducing the V
Transient Detection in the Applications Information section
for more details.) An internal 2.5μA current source pulls
this pin toward INTV
tie the DTR pin to INTV
OUTSENSE1
SENSE
SENSE
+
sensing, Kelvin (4-wire) connect the SENSE
+
pins to the connection between the DCR sense
pins to SGND.
, SENSE2
, SENSE2
OUT
sensing, Kelvin (4-wire) connect the SENSE
pin to the DCR sense capacitor tied to the
SENSE
(Pin 13/Pin 17): Differential Output Sense
SENSE
node connection. These pins also func-
+
OUT
CC
sensing or inductor DCR sensing. For
CC
(Pins 14, 37/Pins 18, 3): Differential
(Pins 15, 36/Pins 19, 2): Differential
sensing or inductor DCR sensing.
, the bottom gate (BG) could turn
. To disable the DTR feature, simply
overshoot. (Refer to Load-Release
CC
SENSE
.
(QFN/TSSOP)
SENSE
. For DCR sensing, tie the
. For DCR sensing, tie
+
pins because there
+
and SENSE
OUT1
+
pin
.
RUN1, RUN2 (Pins 17, 34/Pins 21, 38): Run Control
Inputs. An internal proportional-to-absolute-temperature
(PTAT) pull-up current source (~1.2μA at 25°C) is constantly
connected to this pin. Taking both RUN1 and RUN2 pins
below a threshold voltage (~0.8V at 25°C) shuts down all
bias of INTV
micropower shutdown mode. Allowing either RUN pin to
rise above this threshold would turn on the internal bias
supply and the circuitry for the particular channel. When
a RUN pin rises above 1.2V, its corresponding channel’s
TG and BG drivers are turned on and an additional 5μA
temperature-independent pull-up current is connected
internally to the RUN pin. Either RUN pin can sink up to
50μA, or be forced no higher than 6V.
PGOOD1, PGOOD2 (Pins 18, 33/Pins 22, 37): Power Good
Indicator Outputs. This open-drain logic output is pulled
to ground when the output voltage goes out of a ±7.5%
window around the regulation point, after a 50μs power-
bad-masking delay. Returning to the regulation point, there
is a much shorter delay to power good, and a hysteresis
of around 2% on both sides of the voltage window.
BOOST1, BOOST2 (Pins 19, 32/Pins 23, 36): Boosted
Floating Supplies for Top MOSFET Drivers. The (+) terminal
of the bootstrap capacitor, C
BOOST pins swing by a V
DRV
TG1, TG2 (Pins 20, 31/Pins 24, 35): Top Gate Driver
Outputs. The TG pins drive the gates of the top N-channel
power MOSFET with a voltage swing of V
SW and BOOST.
CC
, or (DRV
CC
and DRV
CC
– V
D
) and (V
CC
IN
and places the LTC3838 into
between a diode drop below
B
, connects to this pin. The
IN
+ DRV
LTC3838
CC
DRVCC
– V
D
).
between
11
3838fa

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