LTC2421 LINER [Linear Technology], LTC2421 Datasheet - Page 13

• Manufacturer Part Number: LTC2421
• Description: 1-/2-Channel 20-Bit UPower No Latency ADCs in MSOP-10
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
As long as the voltage on the V
the – 0.3V to (V
range, a conversion result is generated for any input value
from – 0.125 • V
greater than 1.125 • V
to the value corresponding to 1.125 • V
ages below – 0.125 • V
to the value corresponding to – 0.125 • V
Frequency Rejection Selection (F
The LTC2421/LTC2422 internal oscillator provides better
than 110dB normal mode rejection at the line frequency
and all its harmonics for 50Hz 2% or 60Hz 2%. For
60Hz rejection, F
(Pin 6) while for 50Hz rejection the F
nected to V
The selection of 50Hz or 60Hz rejection can also be made
by driving F
change during the sleep or data output states will not
disturb the converter operation. If the selection is made
during the conversion state, the result of the conversion in
progress may be outside specifications but the following
conversions will not be affected.
Table 2. LTC2421/LTC2422 Output Data Format
Input Voltage
V
9/8 • V
V
V
3/4V
3/4V
1/2V
1/2V
1/4V
1/4V
0
–1LSB
–1/8 • V
V
*Bit 22 is always 0 for the LTC2421 **The sign bit changes state during the 0 code.
IN
REF
REF
+
IN
/0
> 9/8 • V
< –1/8 • V
–
REF
REF
REF
REF
REF
REF
+ 1LSB
REF
CC
REF
+ 1LSB
+ 1LSB
+ 1LSB
O
(Pin 1).
to an appropriate logic level. A selection
REF
CC
REF
REF
O
+ 0.3V) absolute maximum operating
(Pin 10) should be connected to GND
U
REF
to 1.125 • V
REF
Bit 23
EOC
, the conversion result is clamped
0
0
0
0
0
0
0
0
0
0
0
0
0
0
, the conversion result is clamped
U
IN
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
CH0/CH1
Bit 22*
pin is maintained within
REF
W
O
O
Pin Connection)
. For input voltages
pin should be con-
REF
Bit 21
1/0**
REF
. For input volt-
SIG
1
1
1
1
1
1
1
1
1
1
0
0
0
.
U
Bit 20
EXR
1
1
1
0
0
0
0
0
0
0
0
1
1
1
Bit 19
MSB
0
0
0
1
1
1
1
0
0
0
0
1
1
1
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2421/
LTC2422 can operate with an external conversion clock.
The converter automatically detects the presence of an
external clock signal at the F
oscillator. The frequency f
be at least 2560Hz (1Hz notch frequency) to be detected.
The external clock signal duty cycle is not significant as
long as the minimum and maximum specifications for the
high and low periods t
While operating with an external conversion clock of a
frequency f
110dB normal mode rejection in a frequency range f
2560 4% and its harmonics. The normal mode rejection
as a function of the input frequency deviation from f
2560 is shown in Figure 5.
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The LTC2421/
LTC2422 operation will not be disturbed if the change of
conversion clock source occurs during the sleep state or
during the data output state while the converter uses an
Bit 18
0
0
0
1
1
0
0
1
1
0
0
1
1
1
EOSC
Bit 17
0
0
0
1
0
1
0
1
0
1
0
1
1
1
, the LTC2421/LTC2422 provide better than
Bit 16
HEO
1
1
0
1
0
1
0
1
0
1
0
1
0
0
LTC2421/LTC2422
EOSC
and t
O
pin and turns off the internal
Bit 15
of the external signal must
1
1
0
1
0
1
0
1
0
1
0
1
0
0
LEO
are observed.
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Bit 0
LSB
O
1
1
0
1
0
1
0
1
0
1
0
1
0
0
13
pin, the
EOSC
EOSC
24212f
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