HLMP-ED80-XX000 AVAGO [AVAGO TECHNOLOGIES LIMITED], HLMP-ED80-XX000 Datasheet - Page 20

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HLMP-ED80-XX000

Manufacturer Part Number
HLMP-ED80-XX000
Description
Optical Mouse Sensor
Manufacturer
AVAGO [AVAGO TECHNOLOGIES LIMITED]
Datasheet
20
Forcing the SDIO Line to the Hi-Z State
There are times when the SDIO line from the ADNS-
2051 should be in the Hi-Z state. If the microprocessor
has completed a write to the ADNS-2051, the SDIO line
is Hi-Z, since the SDIO pin is still configured as an input.
However, if the last operation from the microprocessor
was a read, the ADNS-2051 will hold the D0 state on
SDIO until a falling edge of SCLK.
Figure 30. SDIO Hi-Z state and timing
Required Timing between Read and Write Commands (tsxx)
There are minimum timing requirements between read
and write commands on the serial port.
If the rising edge of the SCLK for the last data bit of the
Figure 31. Timing between two write commands
If the rising edge of SCLK for the last address bit of
the read command occurs before the 100 microsec-
ond required delay, then the write command may not
complete correctly.
Figure 32. Timing between write and read commands
PD
SDIO
SCLK
SCLK
ADNS-2051 fig 30
100 µs
ADDRESS
ADDRESS
WRITE OPERATION
WRITE OPERATION
Hi-Z
DATA
DATA
ADNS-2051 fig 31
ADNS-2051 fig 32
ADDRESS
t
t
SWW
SWR
WRITE OPERATION
>100 µs
>100 µs
To place the SDIO pin into the Hi-Z state, raise the PD
pin for 100 µs (min). The PD pin can stay high, with the
ADNS-2051 in the shutdown state, or the PD pin can be
lowered, returning the ADNS-2051 to normal operation.
The SDIO line will now be in the Hi-Z state.
second write command occurs before the 100 microsec-
ond required delay, then the first write command may
not complete correctly.
NEXT READ OPERATION
ADDRESS
DATA
• • •
• • •

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