C505_9708 SIEMENS [Siemens Semiconductor Group], C505_9708 Datasheet - Page 55
C505_9708
Manufacturer Part Number
C505_9708
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.C505_9708.pdf
(227 pages)
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System Reset
C505 / C505C
The time required for a reset operation is the oscillator start-up time plus 2 machine cycles, which,
under normal conditions, must be at least 10 - 20 ms for a crystal oscillator. This requirement is
typically met using a capacitor of 4.7 to 10 F. The same considerations apply if the reset signal is
generated externally (figure 5-1 b). In each case it must be assured that the oscillator has started
up properly and that at least two machine cycles have passed before the reset signal goes inactive.
V
a)
b)
CC
C505
C505
+
&
RESET
RESET
V
c)
CC
C505
RESET
+
MCS03291
Figure 5-1
Reset Circuitries
A correct reset leaves the processor in a defined state. The program execution starts at location
0000 H . After reset is internally accomplished the port latches of ports 0 to 4 default in FF H . This
leaves port 0 floating, since it is an open drain port when not used as data/address bus. All other
I/O port lines (ports 1,3 and 4) output a one (1). Port 2 lines output a zero (or one) after reset, if the
EA is held low (or high). The internal SFRs are set to their initial states as defined in table 3-2.
The contents of the internal RAM and XRAM of the C505 are not affected by a reset. After power-
up the contents are undefined, while it remains unchanged during a reset if the power supply is not
turned off.
Semiconductor Group
5-2
1997-08-01
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