ADN2860-EVAL AD [Analog Devices], ADN2860-EVAL Datasheet - Page 18

• Manufacturer Part Number: ADN2860-EVAL
• Description: 3-Channel Digital Potentiometer with Nonvolatile Memory
• Manufacturer: AD [Analog Devices]

ADN2860
For RDAC0 and RDAC1:
For RDAC2:
where:
D is the decimal equivalent of the data contained in the RDAC
register.
R
The output resistance values in Table 11 are set for the given
RDAC latch codes with V
digital potentiometers.
Table 11. R
D (DEC)
511
256
1
0
Note that in the zero-scale condition, a finite wiper resistance of
100 Ω is present. To avoid degradation or possible destruction
of the internal switches, care should be taken to limit the current
flow between Terminals W and B to no more than 20 mA
intermittently or 2 mA continuously.
Channel-to-channel R
change in R
coefficient.
Like the mechanical potentiometer that the RDAC replaces, the
ADN2860 parts are totally symmetrical. The resistance between
the W wiper and the A terminal also produces a digitally con-
trolled complementary resistance, R
B terminal can be floating or tied to the wiper. Setting the
resistance value for R
and decreases as the data loaded in the latch is increased in
value. The general transfer equations for this operation are as
follows:
For RDAC0 and RDAC1:
For RDAC2:
W
is the wiper resistance.
R
R
R
R
WB
WB
WB
WB
( )
( )
( )
( )
D
D
D
D
R
25051
12600
148.8
100
WB
WB
WB
=
=
=
=
at Selected Codes for R
with temperature has a 35 ppm/°C temperature
(d) (Ω)
128
128
512
512
D
D
128
512
×
−
×
−
WA
R
D
R
D
WB
AB
AB
starts at a maximum value of resistance
×
×
matching is better than 0.1%. The
Full scale
Midscale
DD
Output State
1 LSB
Zero scale (wiper contact resistance)
R
R
+
+
AB
AB
= 5 V, which applies to R
R
R
W
W
+
+
R
R
W
W
WA
. When R
WB_FS
= 25 kΩ
WA
is used, the
AB
= 25 kΩ
(1)
(2)
(3)
(4)
Rev. A | Page 18 of 20
For example, the following RDAC latch codes set the
corresponding output resistance values, which apply to
R
Table 12. R
D (DEC)
511
256
1
0
The typical distribution of R
within the same package. Device-to-device matching is lot
dependent, with a worst-case variation of ±15%. R
erature coefficient is 35 ppm/°C.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer can be configured to generate an
output voltage at the wiper terminal, which is proportional to
the input voltages applied to the A and B terminals. Connecting
the A terminal to 5 V and the B terminal to ground produces an
output voltage at the wiper that can vary between 0 V to 5 V.
Each LSB of voltage is equal to the voltage applied across the A
and B terminals divided by the 2
potentiometer divider.
Since the ADN2860 can operate from dual supplies, the general
equations defining the output voltage at V
ground for any given input voltages applied to the A and B
terminals are as follows:
For RDAC0 and RDAC1:
For RDAC2:
Equation 5 assumes that V
wiper resistance. Operation of the digital potentiometer in the
divider mode results in more accurate operation over
temperature. In this mode, the output voltage is dependent on
the ratio of the internal resistors, not on the absolute value;
therefore, the drift improves to 15 ppm/°C. There is no voltage
polarity restriction between the A, B, and W terminals as long
as the terminal voltage (V
AB
= 25 kΩ digital potentiometers.
V
V
W
W
( )
( )
D
D
WA
=
=
(d) at Selected Codes for R
512
128
D
D
R
148.8
12600
25051
25100
WA
×
×
(d) (Ω)
V
V
AB
AB
+
+
TERM
W
V
V
AB
is buffered to null the effect of
B
B
) stays within V
from channel to channel is ±0.1%
N
position resolution of the
Output State
Full scale
Midscale
1 LSB
Zero scale
AB
W
= 25 kΩ
with respect to
SS
< V
AB
TERM
temp-
< V
DD
(5)
(6)
.