ADN2860-EVAL AD [Analog Devices], ADN2860-EVAL Datasheet - Page 10

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ADN2860-EVAL

Manufacturer Part Number
ADN2860-EVAL
Description
3-Channel Digital Potentiometer with Nonvolatile Memory
Manufacturer
AD [Analog Devices]
Datasheet
ADN2860
INTERFACE DESCRIPTIONS
I
All control and access to both EEPROM memory and the RDAC
registers are conducted via a standard 2-wire I
Figure 2 shows the timing characteristics of the I
Figure 16 and Figure 17 illustrate standard transmit and receive
bus signals in the I
These figures use the following legend:
S = Start condition
P = Stop condition
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
R/ W = Read enable at high and write enable at low
2
C INTERFACE
S
S
S
From master to slave
From slave to master
SLAVE ADDRESS
SLAVE ADDRESS
SLAVE ADDRESS
2
C interface.
READ OR WRITE
R/W
A
0 = WRITE
1 = WRITE
R/W
R/W
(N BYTES + ACKNOWLEDGE)
A
A
2
C interface.
DATA
Figure 16. I
2
Figure 17. I
C bus.
Figure 18. Combined Transmit/Read
2
C—Master Transmitting Data to Slave
2
C—Master Reading Data from Slave
Rev. A | Page 10 of 20
A/A
DATA
DATA
REPEATED START
S
SLAVE ADDRESS
(N BYTES + ACKNOWLEDGE)
(N BYTES + ACKNOWLEDGE
DATA TRANSFERRED
DATA TRANSFERRED
A
A
READ OR WRITE
R/W
DIRECTION OF TRANSFER MAY
CHANGE AT THIS POINT
A
DATA
DATA
(N BYTES + ACKNOWLEDGE)
DATA
A/A
A/A
A
P
P
P

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