MCM63R836FC3.0 FREESCALE [Freescale Semiconductor, Inc], MCM63R836FC3.0 Datasheet

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MCM63R836FC3.0

Manufacturer Part Number
MCM63R836FC3.0
Description
MCM63R836
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8M Late Write HSTL
designed to provide high performance in secondary cache and ATM switch,
Telecom, and other high speed memory applications. The MCM63R918
(organized as 512K words by 18 bits) and the MCM63R836 (organized as 256K
words by 36 bits) are fabricated in Motorola’s high performance silicon gate
CMOS technology.
the RAM. At the rising edge of CK; all addresses, write enables, and synchronous
selects are registered. An internal buffer and special logic enable the memory to
accept write data on the rising edge of CK, a cycle after address and control
signals. Read data is also driven on the rising edge of CK.
and output voltage (V DDQ ) gives the system designer greater flexibility in
optimizing system performance.
entire word.
match the impedance of the circuit traces which reduces signal reflections.
MOTOROLA FAST SRAM
REV 1
10/12/00
Motorola, Inc. 2000
The MCM63R836/918 is an 8M–bit synchronous late write fast static RAM
The differential clock (CK) inputs control the timing of read/write operations of
The RAM uses HSTL inputs and outputs. The adjustable input trip–point (V ref )
The synchronous write and byte enables allow writing to individual bytes or the
The impedance of the output buffers is programmable, allowing the outputs to
Byte Write Control
2.5 V – 5% to 3.3 V + 10% Operation
HSTL — I/O (JEDEC Standard JESD8–6 Class I Compatible)
HSTL — User Selectable Input Trip–Point
HSTL — Compatible Programmable Impedance Output Drivers
Register to Register Synchronous Operation
Boundary Scan (JTAG) IEEE 1149.1 Compatible
Differential Clock Inputs
Optional x18 or x36 Organization
MCM63R836/918–3.0 = 3.0 ns
MCM63R836/918–3.3 = 3.3 ns
MCM63R836/918–3.7 = 3.7 ns
MCM63R836/918–4.0 = 4.0 ns
Sleep Mode Operation (ZZ pin)
119–Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Flipped Chip Plastic
Ball Grid Array (PBGA)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MCM63R836
MCM63R918
MCM63R836 MCM63R918
Order this document
CASE 999D–01
FC PACKAGE
by MCM63R836/D
PBGA
1

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MCM63R836FC3.0 Summary of contents

Page 1

Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8M Late Write HSTL The MCM63R836/918 is an 8M–bit synchronous late write fast static RAM designed to provide high performance in secondary cache and ATM switch, Telecom, and other high speed memory applications. ...

Page 2

Freescale Semiconductor, Inc. ADDRESS SA REGISTERS SW SW REGISTERS SBx REGISTERS MCM63R836 DDQ ...

Page 3

Freescale Semiconductor, Inc. MCM63R836 PIN DESCRIPTIONS Pin Locations 4K 4L (a) 6K, 7K, 6L, 7L, 6M, 6N, 7N, 6P, 7P (b) 6D, 7D, 6E, 7E, 6F, 6G, 7G, 6H, 7H (c) 1D, 2D, 1E, 2E, 2F, 1G, 2G, 1H, 2H ...

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Freescale Semiconductor, Inc. MCM63R918 PIN DESCRIPTIONS Pin Locations 4K 4L (a) 6D, 7E, 6F, 7G, 6H, 7K, 6L, 6N, 7P (b) 1D, 2E, 2G, 1H, 2K, 1L, 2M, 1N 2A, 3A, 5A, 6A, 3B, 5B, 6B, 2C, 3C, ...

Page 5

Freescale Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS (Voltages Referenced See Note) Rating Core Supply Voltage Output Supply Voltage Voltage On Any Pin Other Than JTAG Voltage On Any JTAG Pin Input Current (per I/O) Output Current (per ...

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Freescale Semiconductor, Inc. DC OPERATING CONDITIONS AND CHARACTERISTICS (2.375 V RECOMMENDED OPERATING CONDITIONS Parameter Core Power Supply Voltage Output Driver Supply Voltage AC Supply Current x36 (Device Selected, x18 All Outputs Open, Freq = Max Max, V ...

Page 7

Freescale Semiconductor, Inc. DC OUTPUT BUFFER CHARACTERISTICS — PROGRAMMABLE IMPEDANCE PUSH–PULL OUTPUT BUFFER MODE (2.375 3 (out) (RQ)) (See Notes 1 and 2) Parameter Output Logic ...

Page 8

Freescale Semiconductor, Inc. AC OPERATING CONDITIONS AND CHARACTERISTICS (2.375 V Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 9

Freescale Semiconductor, Inc. 0. DDQ /2 V ref DEVICE 50 UNDER TEST 250 ZQ 16 INPUT CHARACTERISTICS (See Note 1) Parameter AC Input Logic High (See Figure 4) AC Input Logic Low (See Figures 2 and ...

Page 10

Freescale Semiconductor, Inc. V DDQ DIF the Common Mode Input Voltage, equals V TR – [(V TR – )/2]. Figure 3. Differential Inputs/Common Mode Input Voltage V ...

Page 11

Freescale Semiconductor, Inc. REGISTER/REGISTER READ–WRITE–READ CYCLES t KHKH CK t AVKH t KHAX SVKH SS SW SBx KHQV DQx Q–1 For More Information On This Product, MOTOROLA FAST SRAM t KHKL t ...

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Freescale Semiconductor, Inc. É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É ...

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Freescale Semiconductor, Inc. FUNCTIONAL OPERATION READ AND WRITE OPERATIONS All control signals are registered on the rising edge of the CK clock. These signals must meet the setup and hold times shown in the AC Characteristics table. On the rising ...

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Freescale Semiconductor, Inc. SLEEP MODE This device is equipped with an optional sleep or low power mode. The sleep mode pine is asynchronous and active high. During normal operation, the ZZ pin is pulled low. When ZZ is pulled high, ...

Page 15

Freescale Semiconductor, Inc. TAP AC OPERATING CONDITIONS AND CHARACTERISTICS (2.375 V Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Freescale Semiconductor, Inc. TEST ACCESS PORT PINS TCK — TEST CLOCK (INPUT) Clocks all TAP events. All inputs are captured on the rising edge of TCK and all outputs propagate from the falling edge of TCK. TMS — TEST MODE ...

Page 17

Freescale Semiconductor, Inc. MCM63R836 Bump/Bit Scan Order Bit Signal g Bump p Bit Signal No. Name ID No ...

Page 18

Freescale Semiconductor, Inc. TAP CONTROLLER INSTRUCTION SET OVERVIEW There are two classes of instructions defined in the IEEE Standard 1149.1–1990; the standard (public) instructions and device specific (private) instructions. Some public instructions, are mandatory for IEEE 1149.1 compliance. Optional public ...

Page 19

Freescale Semiconductor, Inc. STANDARD (PUBLIC) INSTRUCTION CODES Instruction Code* EXTEST 000 Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all DQ pins to High–Z state. NOT IEEE 1149.1 COMPLIANT. IDCODE 001** Preloads ID register ...

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... Freescale Semiconductor, Inc. Motorola Memory Prefix Part Number Full Part Numbers — MCM63R836FC3.0 MCM63R836FC3.3 MCM63R836FC3.7 MCM63R836FC4 PIN A1 INDEX TOP VIEW BOTTOM VIEW For More Information On This Product, ...

Page 21

Freescale Semiconductor, Inc. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability ...

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