CS4341A-KS CIRRUS [Cirrus Logic], CS4341A-KS Datasheet - Page 2

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CS4341A-KS

Manufacturer Part Number
CS4341A-KS
Description
24-Bit, 192 kHz Stereo DAC with Volume Control?
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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TABLE OF CONTENTS
2
Contacting Cirrus Logic Support
F or a co m p le te listing of D ire ct Sa les, D istrib utor, an d S a le s R ep resen ta tive co nta cts, visit the C irru s Lo gic w e b site at:
http://w ww.cirrus.com /corporate/contacts/sales.cfm
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product infor-
mation describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the infor-
mation contained in this docum ent is accurate and reliable. However, the inform ation is subject to change without notice and is provided "AS IS" without warranty
of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being
relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringem ent, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this
information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus
and by furnishing this information, Cirrus grants no license, express or im plied under any patents, mask work rights, copyrights , trademarks, trade secrets or
other intellectual property rights. Cirrus owns the copyrights of the information contained herein and gives consent for copies to be made of the information only
for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not ext e nd to other copying such as copying
for general distribution, advertising or promotional purposes, or for creating any work for resale.
An export per mit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this ma-
terial and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be
obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign
Trade Law and is to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS M AY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAM AGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANT-
ED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Purchase of I
those com ponents in a standard I
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are tradem arks of Cirrus Logic, Inc. All other brand and product names in this document may be trade-
marks or service marks of their respective owners.
1. PIN DESCRIPTION ................................................................................................................... 5
2. TYPICAL CONNECTION DIAGRAM ...................................................................................... 6
3. APPLICATIONS ........................................................................................................................ 7
4. REGISTER QUICK REFERENCE .......................................................................................... 14
2
C com ponents of Cirrus Logic, Inc., or one of its sublicensed Associated Companies conveys a license under the Phillips I
3.1 Upgrading from the CS4341 to the CS4341A .................................................................... 7
3.2 Sample Rate Range/Operational Mode Detect .................................................................. 7
3.3 System Clocking ................................................................................................................ 8
3.4 Digital Interface Format ...................................................................................................... 8
3.5 De-Emphasis Control ......................................................................................................... 9
3.6 Recommended Power-up Sequence ................................................................................. 9
3.7 Popguard
3.8 Grounding and Power Supply Arrangements .................................................................. 10
3.9 Control Port Interface ....................................................................................................... 11
3.10 Memory Address Pointer (MAP)
3.10.1 INCR (Auto Map Increment Enable) ............................................................................ 14
3.10.2 MAP (Memory Address Pointer) .................................................................................. 14
3.2.1 Auto-Detect Enabled ............................................................................................. 7
3.2.2 Auto-Detect Disabled ............................................................................................ 7
3.7.1 Power-up ............................................................................................................. 10
3.7.2 Power-down ........................................................................................................ 10
3.7.3 Discharge Time ................................................................................................... 10
3.9.1 MAP Auto Increment ........................................................................................... 11
3.9.2 I2C Mode ............................................................................................................. 11
3.9.3 SPI Mode ............................................................................................................ 13
2
C system.
®
3.9.2a I2C Write .............................................................................................. 11
3.9.2b I2C Read .............................................................................................. 12
3.9.3a SPI Write .............................................................................................. 13
Transient Control ........................................................................................... 10
.............................................................................. 14
2
C Patent Rights to use
CS4341A
DS582PP1

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