CS4341A-KS CIRRUS [Cirrus Logic], CS4341A-KS Datasheet - Page 18

• Manufacturer Part Number: CS4341A-KS
• Description: 24-Bit, 192 kHz Stereo DAC with Volume Control?
• Manufacturer: CIRRUS [Cirrus Logic]

18
ATAPI4
5.3.2 SOFT RAMP AND ZERO CROSS CONTROL (SZC)
5.3.3 ATAPI CHANNEL MIXING AND MUTING (ATAPI)
0
0
0
0
0
0
0
0
0
0
Fucntion:
Immediate Changes
Changes On Zero Crossings
Soft Ramped Changes
Soft Ramped Changes on Zero Crossings
Fucntion:
ATAPI3
Default = 10
00 - Immediate Changes
01 - Changes On Zero Crossings
10 - Soft Ramped Changes
11 - Soft Ramped Changes On Zero Crossings
When Immediate Changes is selected all level changes will take effect immediately in one step.
Changes on Zero Crossings dictates that signal level changes, either by attenuation changes or mut-
ing, will occur on a signal zero crossing to minimize audible artifacts. The requested level change will
occur after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz
sample rate) if the signal does not encounter a zero crossing. The zero cross function is independent-
tly monitored and implemented for each channel.
Soft Ramped Changes allows level changes, both muting and attenuation, to be implemented by in-
crementally ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1dB per 8
left/right clock periods.
Soft Ramped Changes On Zero Crossings dictates that signal level changes, either by attenuation
changes or muting, will occur in 1/8 dB steps implemented on a signal zero crossing. The 1/8 dB level
change will occur after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms
at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross function is
indepently monitored and implemented for each channel.
Default = 01001 - AOUTA = Left Channel, AOUTB = Right Channel (Stereo)
The CS4341A implements the channel mixing functions of the ATAPI CD-ROM specification. Refer
to Table 7 and Figure 8 for additional information.
0
0
0
0
0
0
0
0
1
1
ATAPI2
0
0
0
0
1
1
1
1
0
0
ATAPI1
0
0
1
1
0
0
1
1
0
0
Table 7. ATAPI Decode
ATAPI0
0
1
0
1
0
1
0
1
0
1
AOUTA
MUTE
MUTE
MUTE
MUTE
aR
aR
aR
aR
aL
aL
BIT 0-4
BIT 5-6
b[(L+R)/2]
b[(L+R)/2]
AOUTB
MUTE
MUTE
MUTE
bR
bR
bR
bL
bL
CS4341A
DS582PP1