k9k8g08u0a-y Samsung Semiconductor, Inc., k9k8g08u0a-y Datasheet - Page 48

• Manufacturer Part Number: k9k8g08u0a-y
• Description: 1g X 8 Bit / 2g X 8 Bit / 4g X 8 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

Read ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Five read cycles sequentially output the manufacturer code(ECh), and the device code and 3rd, 4th, 5th cycle ID respectively.
The command register remains in Read ID mode until further commands are issued to it. Figure 18 shows the operation sequence.
Figure 18. Read ID Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. If the device is already in reset state a new reset command will be
accepted by the command register. The R/B pin transitions to low for tRST after the Reset command is written. Refer to Figure 19
below.
Figure 19. RESET Operation
Table 5. Device Status
R/B
I/O
CLE
CE
WE
ALE
RE
I/O
K9WAG08U1A
K9K8G08U0A K9NBG08U5A
K9WAG08U1A
K9NBG08U5A
X
K9K8G08U0A
X
Operation mode
Device
90h
FFh
Device Code(2nd Cycle)
Address. 1cycle
D3h
00h Command is latched
00h
After Power-up
t
CLR
t
WHR
t
AR
t
CEA
t
REA
3rd Cycle
t
RST
Same as K9K8G08U0A in it
Maker code
51h
48
ECh
Device code
Device
Code
Waiting for next command
3rd Cyc.
4th Cycle
95h
After Reset
FLASH MEMORY
4th Cyc.
5th Cyc.
5th Cycle
58h