FS6377-01 American Microsystems, Inc., FS6377-01 Datasheet - Page 9

• Manufacturer Part Number: FS6377-01
• Description: Programmable 3-pll Clock Generator ic
• Manufacturer: American Microsystems, Inc.

Table 5: Power-Down Bits, continued
Table 6: Divider Control Bits
FBKDIV_C1[10:0]
FBKDIV_C2[10:0]
REFDIV_C1[7:0]
REFDIV_C2[7:0]
FBKDIV_A[10:0]
FBKDIV_B[10:0]
ISO9001
ISO9001
ISO9001
ISO9001
REFDIV_A[7:0]
REFDIV_B[7:0]
(Bits 31-24)
(Bits 55-48)
(Bits 79-72)
(Bits 42-32)
(Bits 66-56)
(Bits 90-80)
(Bits 18-8)
PDPOSTA
PDPOSTB
PDPOSTC
PDPOSTD
(Bits 7-0)
(Bit 120)
(Bit 121)
(Bit 122)
(Bit 123)
NAME
NAME
Power-Down POST divider A
Bit = 0
Bit = 1
Power-Down POST divider B
Bit = 0
Bit = 1
Power-Down POST divider C
Bit = 0
Bit = 1
Power-Down POST divider D
Bit = 0
Bit = 1
REFerence DIVider A (N
REFerence DIVider B (N
REFerence DIVider C1 (N
REFerence DIVider C2 (N
FeedBacK DIVider A (N
FBKDIV_A[2:0]
FBKDIV_A[10:3]
FeedBacK DIVider B (N
FBKDIV_B[2:0]
FBKDIV_B[10:3]
FeedBacK DIVider C1 (N
FBKDIV_C1[2:0]
FBKDIV_C1[10:3]
FeedBacK DIVider C2 (N
FBKDIV_C2[2:0]
FBKDIV_C2[10:3]
selected when the SEL_CD pin = 0
selected when the SEL_CD pin = 1
selected when the SEL_CD pin = 0
selected when the SEL_CD pin = 1
DESCRIPTION
DESCRIPTION
Power On
Power Off
Power On
Power Off
Power On
Power Off
Power On
Power Off
A-Counter Value
M-Counter Value
A-Counter Value
M-Counter Value
A-Counter Value
M-Counter Value
A-Counter Value
M-Counter Value
F
F
R
R
)
)
F
F
)
)
R
R
)
)
)
)
9
Table 7: Divider Control Bits
Table 8: Post Divider Modulus
POST_C1[3:0]
POST_C2[3:0]
POST_D1[3:0]
POST_D2[3:0]
BIT [3]
(Bits 103-100)
(Bits 107-104)
(Bits 115-112)
(Bits 111-108)
(Bits 119-116)
POST_A[3:0]
POST_B[3:0]
(Bits 99-96)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Programmable 3-PLL Clock Generator IC
Programmable 3-PLL Clock Generator IC
Programmable 3-PLL Clock Generator IC
Programmable 3-PLL Clock Generator IC
NAME
BIT [2]
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
POST divider A (see Table 8)
POST divider B (see Table 8)
POST divider C1 (see Table 8)
POST divider C2 (see Table 8)
POST divider D1 (see Table 8)
POST divider D2 (see Table 8)
selected when the SEL_CD pin = 0
selected when the SEL_CD pin = 1
selected when the SEL_CD pin = 0
selected when the SEL_CD pin = 1
BIT [1]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
DESCRIPTION
FS6377-01
FS6377-01
FS6377-01
FS6377-01
BIT [0]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DIVIDE BY
10
12
15
16
18
20
25
50
1
2
3
4
5
6
8
9
11.22.02