74HC540D,652 NXP Semiconductors, 74HC540D,652 Datasheet - Page 12

• Manufacturer Part Number: 74HC540D,652
• Description: IC INVERTER 8-INPUT 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr

Specifications of 74HC540D,652

• Logic Type: Inverter
• Package / Case: 20-SOIC (7.5mm Width)
• Number Of Inputs: 8
• Number Of Circuits: 1
• Current - Output High, Low: 7.8mA, 7.8mA
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: 74HC
• Number Of Channels Per Chip: 8
• Polarity: Inverting
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 7.8 mA
• Input Bias Current (max): 8 uA
• Low Level Output Current: 7.8 mA
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Output Type: 3-State
• Propagation Delay Time: 30 ns
• Number Of Lines (input / Output): 8 / 8
• Logical Function: Buffer/Line Driver
• Number Of Elements: 1
• Number Of Channels: 8
• Number Of Outputs: 8
• Operating Supply Voltage (typ): 5V
• Package Type: SO
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 2V
• Quiescent Current: 8uA
• Technology: CMOS
• Pin Count: 20
• Mounting: Surface Mount
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2708-5; 933715490652

Philips Semiconductors
Test circuit for 74HC
HCT TYPES
AC waveforms 74HCT
March 1988
handbook, full pagewidth
HCMOS family characteristics
Switch position
Note
1. For open-drain N-channel outputs t
TEST
t
t
t
t
C
R
PZH
PZL
PHZ
PLZ
L
T
=
=
Fig.8 Input rise and fall times, transition times and propagation delays for combinatorial logic ICs.
load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
SWITCH
GND
V
GND
V
CC
CC
handbook, halfpage
GENERATOR
PULSE
INPUT
OUTPUT
Fig.7 Test circuit for 3-state outputs.
PLZ
and t
V I
t PHL
t THL
10%
90%
PZL
R T
t r
1.3 V
are applicable.
90%
1.3 V
10%
D.U.T
V CC
12
o
of
t f
V O
C L
t PLH
t TLH
R L = 1 k
50 pF
MGK567
FAMILY SPECIFICATIONS
3 V
GND
MGK563
V CC