CY28510OC SPECTRALINEAR [SpectraLinear Inc], CY28510OC Datasheet - Page 4

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CY28510OC

Manufacturer Part Number
CY28510OC
Description
Peripheral I/O Clock Generator
Manufacturer
SPECTRALINEAR [SpectraLinear Inc]
Datasheet
Rev 1.0, November 20, 2006
Table 3. Byte Read and Byte Write Protocol
Serial Control Registers
Byte 0: Clock Enable Register 1
Bit
20:27
11:18
7
6
5
4
3
2
1
0
2:8
Bit
10
19
28
29
1
9
@Pup
Start
Slave address – 7 bits
Write = 0
Acknowledge from slave
Command Code – 8 bits
'1xxxxxxx' stands for byte operation, bits[6:0] of
the command code represents the offset of the
byte to be accessed
Acknowledge from slave
Data byte from master – 8 bits
Acknowledge from slave
Stop
1
1
1
1
1
1
1
1
Byte Write Protocol
Description
CLKG0_0
CLKG0_1
CLKG0_2
CLKG0_3
CLKG0_4
CLKG0_5
CLKG0_6
CLKG0_7
Name
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
11:18
21:27
30:37
Bit
2:8
10
19
20
28
29
38
39
1
9
Repeat start
Start
Slave address – 7 bits
Write = 0
Acknowledge from slave
Command Code – 8 bits
'1xxxxxxx' stands for byte operation, bits[6:0]
of the command code represents the offset
of the byte to be accessed
Acknowledge from slave
Slave address – 7 bits
Read = 1
Acknowledge from slave
Data byte from slave – 8 bits
Not acknowledge
Stop
Description
Byte Read Protocol
Description
CY28510
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