CY28510OC SPECTRALINEAR [SpectraLinear Inc], CY28510OC Datasheet

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CY28510OC

Manufacturer Part Number
CY28510OC
Description
Peripheral I/O Clock Generator
Manufacturer
SPECTRALINEAR [SpectraLinear Inc]
Datasheet
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Features
• 15 33.27 MHz or 66.669-MHz clock outputs
• 1 REF 14.318 MHz
• Divide by 2, spread spectrum and output enable all
• Divide by 2 mode default values strappable on a
• Output Enable pin controls all outputs
Block Diagram
ADDSEL(0:1)
CLK_STOP#
selectable on a per-output basis via I
per-group basis
XIN
SDATA
SCLK
(Group Frequency Select, 33 or 66MHz)
GFS1
GFS0
GFS2
GFS3
OE
I2C
Spectrum
Spectrum
PLL 1
Spread
PLL 2 no
Spread
with
66MHz
66MHz
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
Mux
2
C register bits
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Tel:(408) 855-0555
CLKG0_1
CLKG0_2
CLKG0_3
CLKG0_4
CLKG0_5
CLKG0_6
CLKG0_7
CLKG1_0
CLKG1_1
CLKG1_2
CLKG1_3
CLKG2_0
CLKG2_1
CLKG3
REF
CLKG0_0
Peripheral I/O Clock Generator
• I
• I
• I
• 48-Pin SSOP Package
Modes
CLK_STOP#
2
2
2
Pin Configuration
C Compatible Programmability With Block and Byte
C Operates Up to 1MHz
C Address Selection of D0, D2, D4 or D6
ADDSEL0
ADDSEL1
CLKG2_1
CLKG2_0
Fax:(408) 855-0550
VDDQ3
VDDQ2
SDATA
CLKG3
VSSQ3
VSSQ2
VDDC
XOUT
VSSC
VSSX
SCLK
GFS1
GFS2
VDDX
GFS3
GFS0
REF
XIN
OE
10
11
1
2
3
4
5
6
7
8
9
12
13
14
15
16
17
18
19
20
21
22
23
24
www.SpectraLinear.com
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CY28510
VDDQ0
CLKG0_0
CLKG0_1
VSSQ0
CLKG0_2
VDDQ0
VSSQ0
CLKG0_3
CLKG0_4
VDDQ0
CLKG0_5
CLKG0_6
CLKG0_7
VDDQ1
CLKG1_0
CLKG1_1
VSSQ1
VDDQ1
CLKG1_2
CLKG1_3
VSSQ1
VDDA
VSSA
VSSQ0
Page 1 of 12

Related parts for CY28510OC

CY28510OC Summary of contents

Page 1

Features • 15 33.27 MHz or 66.669-MHz clock outputs • 1 REF 14.318 MHz • Divide by 2, spread spectrum and output enable all selectable on a per-output basis via I • Divide by 2 mode default values strappable on ...

Page 2

Pin Description Pin Name 2 REF 6 XIN 7 XOUT 9 ADDSEL0 250 K 10 ADDSEL1 250 K 12 CLK_STOP# 250 K 13 SCLK 14 SDATA 3 GFS0 250 K 15 GFS1 250 K 16 GFS2 250 K 1 GFS3 ...

Page 3

Serial Data Interface To enhance the flexibility and function of the clock synthesizer, a two-signal serial interface is provided. Through the Serial Data Interface, various device functions, such as individual clock output buffers, can be individually enabled or disabled. The ...

Page 4

Table 3. Byte Read and Byte Write Protocol Byte Write Protocol Bit Description 1 Start 2:8 Slave address – 7 bits 9 Write = 0 10 Acknowledge from slave 11:18 Command Code – 8 bits '1xxxxxxx' stands for byte operation, ...

Page 5

Byte 1: Clock Enable Register 2 Bit @Pup Byte 2: Clock Spread Spectrum Control Register Bit @Pup ...

Page 6

Byte 3: Clock Spread Enable Register 1 Bit @Pup Byte 4: Clock Spread Enable Register 2 Bit @Pup ...

Page 7

Byte 7: Dial-a-Frequency Control Register N [default = 66.669 MHz 149d 8d] Bit @Pup 7 1 N7, MSB ...

Page 8

Calculating Load Capacitors In addition to the standard external trim capacitors, trace capacitance and pin capacitance must also be considered to correctly calculate crystal loading. As mentioned previously, the capacitance on each side of the crystal is in series with ...

Page 9

CLK_STOP# Clarification The CLK_STOP# signal is an active low input used for synchronous stopping and starting the CLK output clocks while the rest of ...

Page 10

Absolute Maximum Conditions Parameter Description V V 3.3V Supply Voltage DD, DDC, V DDA V Output Buffer Supply Voltage DDQ V Input Voltage IN T Temperature, Storage S T Temperature, Operating Ambient A T Temperature, Junction J Ø Dissipation, Junction ...

Page 11

AC Electrical Specifications Parameter Description CLK F VCO Frequency Range VCO T CLK Duty Cycle CLK Rise and Fall Times RISE FALL T Any CLK to Any CLK Clock Skew GSKEW1 within a Group T Any CLK ...

Page 12

... Part Number CY28510OC 48-pin Shrunk Small Outline package (SSOP) CY28510OCT 48-pin Shrunk Small Outline package (SSOP) - Tape and Reel Package Drawing and Dimension While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc. assumes no responsibility for the use of any cir- cuitry or for the infringement of any patents or other rights of third parties which would result from each use ...

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