PLL701-01 PhaseLink (PLL), PLL701-01 Datasheet - Page 2

• Manufacturer Part Number: PLL701-01
• Description: , 1x Out, 15-30MHz In, 15-30MHz Out, SST
• Manufacturer: PhaseLink (PLL)

BLOCK DIAGRAM
PIN DESCRIPTIONS
FUNCTIONAL DESCRIPTION
Selectable spread spectrum and modulation rates
The PLL701-01/02/04/06 provides selectable spread spectrum modulation, as well as selectable modulation rate.
Selection is made by connecting specific pins to a logical “zero” or “one”, according to the output clock selection
table and modulation rate selection table on page 1.
In order to reduce the number of pins on the chip, the PLL701-01/02/04/06 uses pin 2 (XOUT/SD) as a bi-
directional pin. The pin serves as modulation rate selector input (SD) upon power-up (see modulation rate table on
page 1), and as XOUT crystal connection as soon as the input has been latched.
Pins 3 (SC0), 4 (SC1), and 7 (SC2) are used as inputs to select the spread spectrum modulation as shown on the
output clock selection table (page 1).
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
XOUT/SD
XIN/FIN
Name
FOUT
GND
VDD
SC0
SC1
SC2
Number
SC(0:2)
1
2
3
4
7
8
6
5
XOUT
XIN
Type
O
B
P
P
I
I
I
I
XTAL
OSC
Crystal input to be connected to fundamental parallel mode crystal.(C
clock input.
At power-up, this pin is an input pin to select modulation rate. After input
sampling, this pin is crystal output. Has internal pull up resistor.
Digital control input to select output frequency. Has internal pull-up.
Digital control input to select output frequency. Has internal pull-up.
Digital control input to select output frequency. Has internal pull-up.
3.3V Power Supply.
Modulated Clock Frequency Output. The frequency before modulation is
synthesized by multiplying the input frequency by 1X, 2X, 4X, 6X depending on
the part number (PLL701-01, -02, -04, -06).
Ground.
Low EMI Spread Spectrum Multiplier Clock
Preliminary
Control
Logic
SST
PLL
PLL701-01/02/04/06
Description
VDD
FOUT
Rev 09/11/02 Page 2
L
=18pF) or