PLL701-05 PhaseLink (PLL), PLL701-05 Datasheet

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PLL701-05

Manufacturer Part Number
PLL701-05
Description
Low EMI Spread Spectrum Multiplier IC
Manufacturer
PhaseLink (PLL)
Datasheet
FEATURES
DESCRIPTION
The PLL701-50 is a low EMI Clock Generator and
Multiplier for high-speed digital systems. It uses
PhaseLink’s unique (Patent Pending) Spread
Spectrum Technology (SST) and permits different
levels of EMI reduction by selecting the amplitude of
the applied SST. The SST feature can be disabled.
The chip operates with input frequencies ranging from
13 to 30 MHz and provides 1x to 8x multiplication at
its output.
OUTPUT CLOCK (FOUT) SELECTION
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 1
M2
0
0
0
0
1
1
1
1
Spread Spectrum Clock Generator/Multiplier with
output selectable from 1x to 8x.
13MHz to 224MHz output with output enable.
13MHz to 30 MHz input frequency from crystal or
external clock signal.
Reduced EMI from Spread Spectrum Modulation,
with selectable modulation magnitude for Center
Spread, Down Spread or Asymmetric Spread.
TTL/CMOS compatible outputs.
3.3V Operating Voltage.
150 ps maximum cycle-to-cycle jitter.
Available in 16-Pin 150mil SSOP.
M1
0
0
1
1
0
0
1
1
M0
0
1
0
1
0
1
0
1
13 ~ 28
13 ~ 28
14 ~ 30
13 ~ 28
20 ~ 30
17 ~ 30
15 ~ 30
13 ~ 28
FIN/XIN
(MHz)
Multiplier
X1
X2
X3
X4
X5
X6
X7
X8
100 ~ 150
102 ~ 180
105 ~ 210
104 ~ 224
52 ~ 112
13 ~ 28
26 ~ 56
42 ~ 90
(MHz)
FOUT
Low EMI Spread Spectrum Multiplier IC
BLOCK DIAGRAM
DIE SPECIFICATIONS
Y
Pad dimensions
XOUT/SD0*^
XIN/FIN
X
Reverse side
XOUT
SC(0:3)
SD(0:1)
Thickness
GNDOSC
M(0:2)
Name
TESTB
Size
SC0^
SC1^
DIE PAD CONFIGURATION
M2^
M1^
M0^
XTAL
OSC
23
25
28
29
30
33
34
35
1
C501A
A2727
22
-27
Control
80 micron x 80 micron
69 mil
Logic
SST
PLL
PLL701-50
21
104 x 69 mil
4
20
Value
10 mil
5
GND
OE
6
19
18
17
16
15
14
13
12
10
8
7
REF
FOUT
1700, 2540
AVDD
AVDD
REF/SD1*^
VDD
VDD (optional)
VDD (optional)
SC3^
OE^
FOUT
GNDBUF

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PLL701-05 Summary of contents

Page 1

... Available in 16-Pin 150mil SSOP. DESCRIPTION The PLL701- low EMI Clock Generator and Multiplier for high-speed digital systems. It uses PhaseLink’s unique (Patent Pending) Spread Spectrum Technology (SST) and permits different levels of EMI reduction by selecting the amplitude of the applied SST ...

Page 2

... Fin / 512 3.000 3.250 3.500 3.750 0. PLL701-50 Modulation Type C ± 0.125% C ± 0.25% C ± 0.375% C ± 0.625% A +0.125 ~ -1.125% C ± 0.75% A +0.25 ~ -1.25% C ± 0.875% A +0.375 ~ -1.375% C ± 1.00% A +0.50 ~ -1.5% D -2.00% C ± 1.125% A +0.625 ~ -1.625 ...

Page 3

... In order to reduce the number of pins on the chip, the PLL701-50 uses pins 2 and 14 (XOUT/SD0 and REF/SD1) as bi-directional pins. The pins serve as modulation type selector inputs (SD0 and SD1) upon power-up (see spread spectrum selection table on page 2), and as XOUT crystal connection (pin 2), and REF output signal (pin 14) as soon as the inputs have been latched ...

Page 4

... XOUT* R PIN PIN 3,4,5,6,7,8,11,12, Load CC CONDITIONS T Measured at 0.8V ~ 2. Measured at 2.0V ~ 0. X1, X2, X4, X8 FOUT @ 3.3V X3, X5, X6, X7 FOUT @ 3.3V PLL701-50 MIN. TYP. MAX. 2.97 3. 100 100 2.4 0.4 See Output Clock Selection table on page 1 See Output Clock Selection table on page 1 100 18 120 MIN ...

Page 5

... Disables multiplication and SST when pulled low. For crystal fine tuning. 680.1 Internal pull up. 354.9 Digital control input to select SS modulation magnitude.30kΩ internal pull-up. 110.7 Digital control input to select SS modulation magnitude.30kΩ internal pull-up. PLL701-50 Description =18pF) L Rev 09/20/04 Page 5 www.phaselink.com ...

Page 6

... President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 Low EMI Spread Spectrum Multiplier IC 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL701- Marking P701-50DC PLL701-50 TEMPERATURE C=COMMERCIAL ...

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