74AUP2G132DC,125 NXP Semiconductors, 74AUP2G132DC,125 Datasheet - Page 20
74AUP2G132DC,125
Manufacturer Part Number
74AUP2G132DC,125
Description
IC NAND SCHMITT DUAL 8-VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP2G132GM125.pdf
(23 pages)
Specifications of 74AUP2G132DC,125
Number Of Circuits
2
Package / Case
US8, 8-VSSOP
Logic Type
NAND Gate - Schmitt Trigger
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
22.6 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G132DC-G
74AUP2G132DC-G
935280732125
74AUP2G132DC-G
935280732125
NXP Semiconductors
18. Abbreviations
Table 12.
19. Revision history
Table 13.
74AUP2G132
Product data sheet
Acronym
CDM
DUT
ESD
HBM
MM
Document ID
74AUP2G132 v.4
Modifications:
74AUP2G132 v.3
74AUP2G132 v.2
74AUP2G132 v.1
Abbreviations
Revision history
Description
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
20101104
20081215
20080314
20061018
Release date
•
•
•
Added type number 74AUP2G132GF (SOT1089/XSON8 package).
Added type number 74AUP2G132GN (SOT1116/XSON8 package).
Added type number 74AUP2G132GS (SOT1203/XSON8 package).
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Rev. 4 — 4 November 2010
Low-power dual 2-input NAND Schmitt trigger
Change notice
-
-
-
-
74AUP2G132
Supersedes
74AUP2G132 v.3
74AUP2G132 v.2
74AUP2G132 v.1
-
© NXP B.V. 2010. All rights reserved.
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