74AUP2G132DC,125 NXP Semiconductors, 74AUP2G132DC,125 Datasheet - Page 15

IC NAND SCHMITT DUAL 8-VSSOP

74AUP2G132DC,125

Manufacturer Part Number
74AUP2G132DC,125
Description
IC NAND SCHMITT DUAL 8-VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G132DC,125

Number Of Circuits
2
Package / Case
US8, 8-VSSOP
Logic Type
NAND Gate - Schmitt Trigger
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
22.6 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G132DC-G
74AUP2G132DC-G
935280732125
NXP Semiconductors
Fig 17. Package outline SOT1089 (XSON8)
74AUP2G132
Product data sheet
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1089
Unit
Outline
version
max
nom
min
A
0.5
(1)
0.04
A
terminal 1
index area
terminal 1
index area
1
0.20
0.15
0.12
(4×)
b
IEC
b
(2)
1.40
1.35
1.30
4
1
D
1.05
1.00
0.95
E
L
1
0.55 0.35
MO-252
JEDEC
e
All information provided in this document is subject to legal disclaimers.
E
e
e
1
References
L
Rev. 4 — 4 November 2010
0
0.35
0.30
0.27
L
5
8
0.40
0.35
0.32
L
1
e
JEITA
D
1
scale
0.5
Low-power dual 2-input NAND Schmitt trigger
A
1 mm
(8×)
A
1
(2)
detail X
European
projection
X
74AUP2G132
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-09
10-04-12
sot1089_po
SOT1089
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