CY2308-1 CYPRESS [Cypress Semiconductor], CY2308-1 Datasheet - Page 2

• Manufacturer Part Number: CY2308-1
• Description: 3.3V Zero Delay Buffer
• Manufacturer: CYPRESS [Cypress Semiconductor]

Pinouts
Table 1. Pin Definitions - 16 Pin SOIC
Select Input Decoding
Document Number: 38-07146 Rev. *E
Notes
1. Weak pull down.
2. Weak pull down on all outputs.
3. Weak pull ups on these inputs.
4. Outputs inverted on 2308–2 and 2308–3 in bypass mode, S2 = 1 and S1 = 0.
Pin
S2
10
12
13
14
15
16
11
0
0
1
1
1
2
3
4
5
6
7
8
9
REF
CLKA1
CLKA2
V
GND
CLKB1
CLKB2
S2
S1
CLKB3
CLKB4
GND
V
CLKA3
CLKA4
FBK
DD
DD
[3]
[3]
[1]
S1
0
1
0
1
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Signal
CLOCK A1–A4
Driven
Tri-State
Driven
Driven
Input reference frequency, 5V tolerant input
Clock output, Bank A
Clock output, Bank A
3.3V supply
Ground
Clock output, Bank B
Clock output, Bank B
Select input, bit 2
Select input, bit 1
Clock output, Bank B
Clock output, Bank B
Ground
3.3V supply
Clock output, Bank A
Clock output, Bank A
PLL feedback input
[4]
Figure 1. Pin Diagram - 16 Pin SOIC
CLKA1
CLKA2
CLKB1
CLKB2
GND
REF
V
S2
DD
CLOCK B1–B4
Tri-State
Tri-State
Driven
1
2
3
4
5
6
7
8
Top View
Driven
[4]
15
14
13
12
11
10
16
9
FBK
CLKA4
CLKA3
V
GND
CLKB4
CLKB3
S1
Description
DD
Output Source
Reference
PLL
PLL
PLL
PLL Shutdown
N
N
Y
Y
CY2308
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