74HC3G14DP,125 NXP Semiconductors, 74HC3G14DP,125 Datasheet - Page 11

IC INV SCHMITT-TRIGGER 8-TSSOP

74HC3G14DP,125

Manufacturer Part Number
74HC3G14DP,125
Description
IC INV SCHMITT-TRIGGER 8-TSSOP
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC3G14DP,125

Number Of Circuits
3
Logic Type
Inverter with Schmitt Trigger
Package / Case
8-TSSOP
Number Of Inputs
1
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
125 ns, 25 ns, 21 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HC3G14DP-G
74HC3G14DP-G
935272126125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC3G14DP,125
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
14. Application information
74HC_HCT3G14_3
Product data sheet
Fig 12.
linear change of V
I
CC(AV)
as a function of V
The slow input rise and fall times cause additional power dissipation, which can be
calculated using the following formula:
P
Figure
An example of a relaxation circuit using the 74HC3G14/74HCT3G14 is shown
in
I
add
I
P
f
t
t
CC(AV)
Figure
i
r
f
between 0.1V
I
add
= input frequency (MHz);
= input fall time (ns); 90 % to 10 %;
= input rise time (ns); 10 % to 90 %;
CC(AV)
= f
= additional power dissipation ( W);
13.
i
differs with positive or negative input transitions, as shown in
14.
I
CC(AV)
( A)
(t
= average additional supply current ( A).
CC
r
200
150
100
50
0
CC
for 74HC3G14
0
I
to 0.9V
CC(AV)
CC
+ t
.
Rev. 03 — 8 May 2009
f
2.0
I
CC(AV)
)
4.0
74HC3G14; 74HCT3G14
positive-going
negative-going
V
CC
edge
V
edge
CC
where:
(V)
mna036
6.0
Triple inverting Schmitt trigger
Figure 12
© NXP B.V. 2009. All rights reserved.
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