BS85B12-3 HOLTEK [Holtek Semiconductor Inc], BS85B12-3 Datasheet - Page 81

• Manufacturer Part Number: BS85B12-3
• Description: Touch Key Flash Type 8-Bit MCU with LCD/LED Driver
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

BS85B12-3/BS85C20-3
Touch Key Flash MCU with LCD/LED Driver
Rev. 1.00
Bit 3
Bit 2
Bit 1
Bit 0
These two bits are used to determine how the TM output pin changes state when a certain
condition is reached. The function that these bits select depends upon in which mode the TM is
running.
In the Compare Match Output Mode, the T2IO1 and T2IO0 bits determine how the TM output
pin changes state when a compare match occurs from the Comparator A. The TM output pin can
be setup to switch high, switch low or to toggle its present state when a compare match occurs
from the Comparator A. When the bits are both zero, then no change will take place on the
output. The initial value of the TM output pin should be setup using the T2OC bit in the TM2C1
register. Note that the output level requested by the T2IO1 and T2IO0 bits must be different from
the initial value setup using the T2OC bit otherwise no change will occur on the TM output pin
when a compare match occurs. After the TM output pin changes state it can be reset to its initial
level by changing the level of the T2ON bit from low to high.
In the PWM Mode, the T2IO1 and T2IO0 bits determine how the TM output pin changes state
when a certain compare match condition occurs. The PWM output function is modified by
changing these two bits. It is necessary to change the values of the T2IO1 and T2IO0 bits only
after the TM has been switched off. Unpredictable PWM outputs will occur if the T2IO1 and
T2IO0 bits are changed when the TM is running
T2OC: TP2_0, TP2_1 Output control bit
Compare Match Output Mode
PWM Mode/ Single Pulse Output Mode
This is the output control bit for the TM output pin. Its operation depends upon whether TM is
being used in the Compare Match Output Mode or in the PWM Mode/ Single Pulse Output Mode.
It has no effect if the TM is in the Timer/Counter Mode. In the Compare Match Output Mode it
determines the logic level of the TM output pin before a compare match occurs. In the PWM
Mode it determines if the PWM signal is active high or active low.
T2POL: TP2_0, TP2_1 Output polarity Control
This bit controls the polarity of the TP2_0 or TP2_1 output pin. When the bit is set high the TM
output pin will be inverted and not inverted when the bit is zero. It has no effect if the TM is in the
Timer/Counter Mode.
T2DPX: TM1 PWM period/duty Control
This bit, determines which of the CCRA and CCRP registers are used for period and duty
control of the PWM waveform.
T2CCLR: Select TM1 Counter clear condition
This bit is used to select the method which clears the counter. Remember that the Standard
TM contains two comparators, Comparator A and Comparator P, either of which can be selected
to clear the internal counter. With the T2CCLR bit set high, the counter will be cleared when a
compare match occurs from the Comparator A. When the bit is low, the counter will be cleared
when a compare match occurs from the Comparator P or with a counter overflow. A counter
overflow clearing method can only be implemented if the CCRP bits are all cleared to zero. The
T2CCLR bit is not used in the PWM, Single Pulse or Input Capture Mode.
0: initial low
1: initial high
0: Active low
1: Active high
0: non-invert
1: invert
0: CCRP - period; CCRA - duty
1: CCRP - duty; CCRA - period
0: TM2 Comparatror P match
1: TM2 Comparatror A match
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February 1, 2011