A25L40PT-F AMICC [AMIC Technology], A25L40PT-F Datasheet - Page 11

• Manufacturer Part Number: A25L40PT-F
• Description: 4 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4.) sets the
Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every
Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and
Write Status Register (WRSR) instruction.
Figure 4. Write Enable (WREN) Instruction Sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 5.) resets the
Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip
Select (
Chip The Write Enable Latch (WEL) bit is reset under the
following conditions:
Figure 5. Write Disable (WRDI) Instruction Sequence
PRELIMINARY
S
) Low, sending the instruction code, and then driving
(May, 2007, Version 0.4)
S
S
C
C
D
Q
D
Q
High Impedance
High Impedance
0 1
0 1
2 3
2 3
Instruction
Instruction
10
The Write Enable (WREN) instruction is entered by driving
Chip Select (
driving Chip Select (
4 5
4 5
﹣
﹣ Write Disable (WRDI) instruction completion
﹣ Write Status Register (WRSR) instruction completion
﹣ Page Program (PP) instruction completion
﹣ Sector Erase (SE) instruction completion
﹣ Bulk Erase (BE) instruction completion
Power-up
6 7
6 7
S
) Low, sending the instruction code, and then
S
) High.
AMIC Technology Corp.
A25L40P Series