UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 84

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

84
Signal from address comparator (R)
Serial interface operation enable/disable specification bit (W)
COI
CSIE0
Note COI can be read only before serial transfer is started or after serial transfer is completed. An
Remarks 1. Each mode can be selected by setting CSIE0, CSIM03, and CSIM02.
Note
undefined value may be read during transfer.
COI data written by an 8-bit manipulation instruction is ignored.
When the slave address register (SVA) does not match
the data of the shift register
0
1
2. The P01/SCK0 pin assumes the following state according to the setting of CSIE0, CSIM01, and
CSIM00:
CSIE0
Condition for being cleared (COI = 0)
CSIE0
Shift operation disabled
Shift operation enabled
Shift register 0 operation
Fig. 4-40 Format of Serial Operation Mode Register 0 (CSIM0) (3/3)
0
1
1
1
0
1
0
0
0
1
1
1
CSIM03
CSIM01
0
1
1
0
0
0
1
1
0
1
1
CSIM02
CSIM00
0
1
0
0
1
0
1
1
0
1
Operation halt mode
Three-wire serial I/O mode
SBI mode
Two-wire serial I/O mode
Input port
High impedance
High level output
Serial clock output (High level output)
Cleared
Count operation
Serial clock counter
P01/SCK0 pin state
Operation mode
When the slave address register (SVA) matches the
data of the shift register
Held
Can be set.
IRQCSI0 flag
Condition for being set (COI = 1)
Used only for port 0
Used in each mode as
well as for port 0
SO0/SB0, SI0/SB1 pin
PD75238