DS1822-PAR_07 DALLAS [Dallas Semiconductor], DS1822-PAR_07 Datasheet - Page 5

• Manufacturer Part Number: DS1822-PAR_07
• Description: Econo 1-Wire Parasite-Power Digital Thermometer
• Manufacturer: DALLAS [Dallas Semiconductor]

64-BIT LASERED ROM CODE
Each DS1822-PAR contains a unique 64-bit code (see Figure 5) stored in ROM. The least significant
eight bits of the ROM code contain the DS1822-PAR’s 1-Wire family code: 22h. The next 48 bits contain
a unique serial number. The most significant eight bits contain a cyclic redundancy check (CRC) byte that
is calculated from the first 56 bits of the ROM code. A detailed explanation of the CRC bits is provided in
the CRC GENERATION section. The 64-bit ROM code and associated ROM function control logic
allow the DS1822-PAR to operate as a 1-Wire device using the protocol detailed in the 1-WIRE BUS
SYSTEM section of this data sheet.
64-BIT LASERED ROM CODE Figure 5
MEMORY
The DS1822-PAR’s memory is organized as shown in Figure 6. The memory consists of an SRAM
scratchpad with NV EEPROM storage for the high and low alarm trigger registers (T
configuration register. Note that if the DS1822-PAR alarm function is not used, the T
can serve as general-purpose memory. All memory commands are described in detail in the DS1822-PAR
FUNCTION COMMANDS section.
DS1822-PAR MEMORY MAP Figure 6
Byte 0 and byte 1 of the scratchpad contain the LSB and the MSB of the temperature register,
respectively. These bytes are read-only. Bytes 2 and 3 provide access to T
contains the configuration register data, which is explained in detail in the CONFIGURATION
REGISTER section of this data sheet. Bytes 5, 6 and 7 are reserved for internal use by the device and
cannot be overwritten.
Byte 8 of the scratchpad is read-only and contains the cyclic redundancy check (CRC) code for bytes 0
through 7 of the scratchpad. The DS1822-PAR generates this CRC using the method described in the
CRC GENERATION section.
MSB
byte 0 Temperature LSB (50h)
byte 1 Temperature MSB (05h)
byte 2 T
byte 3 T
byte 4 Configuration Register*
byte 5 Reserved (FFh)
byte 6 Reserved
byte 7 Reserved (10h)
byte 8 CRC*
8-BIT CRC
*
SCRATCHPAD (Power-up State)
in EEPROM
Power-up state depends on value(s) stored
H
L
Register or User Byte 2*
Register or User Byte 1*
LSB
MSB
48-BIT SERIAL NUMBER
(85°C)
5 of 19
LSB
T
T
H
L
Configuration Register
Register or User Byte 2
Register or User Byte 1
MSB
8-BIT FAMILY CODE (22h)
EEPROM
H
and T
L
H
registers. Byte 4
and T
H
and T
DS1822-PAR
L
registers
L
) and
LSB