DS1822-PAR_07 DALLAS [Dallas Semiconductor], DS1822-PAR_07 Datasheet - Page 4

• Manufacturer Part Number: DS1822-PAR_07
• Description: Econo 1-Wire Parasite-Power Digital Thermometer
• Manufacturer: DALLAS [Dallas Semiconductor]

TEMPERATURE REGISTER FORMAT Figure 3
TEMPERATURE/DATA RELATIONSHIP Table 2
OPERATION—ALARM SIGNALING
After the DS1822-PAR performs a temperature conversion, the temperature value is compared to the
user-defined two’s complement alarm trigger values stored in the 1-byte T
4). The sign bit (S) indicates if the value is positive or negative: for positive numbers S = 0 and for
negative numbers S = 1. The T
device is powered down. T
in the MEMORY section of this data sheet.
T
Only bits 11 through 4 of the temperature register are used in the T
are 8-bit registers. If the measured temperature is lower than or equal to T
an alarm condition exists and an alarm flag is set inside the DS1822-PAR. This flag is updated after every
temperature measurement; therefore, if the alarm condition goes away, the flag will be turned off after the
next temperature conversion.
The master device can check the alarm flag status of all DS1822-PARs on the bus by issuing an Alarm
Search [ECh] command. Any DS1822-PARs with a set alarm flag will respond to the command, so the
master can determine exactly which DS1822-PARs have experienced an alarm condition. If an alarm
condition exists and the T
to validate the alarm condition.
MS Byte
H
LS Byte
AND T
bit 7
S
L
*The power-on reset value of the temperature register is +85°C
REGISTER FORMAT Figure 4
bit 15
TEMPERATURE
bit 7
2
S
3
+25.0625°C
-25.0625°C
+10.125°C
-10.125°C
bit 6
+85°C*
+0.5°C
2
-0.5°C
-55°C
6
0°C
H
bit 14
H
bit 6
or T
2
S
and T
2
H
L
bit 5
2
and T
settings have changed, another temperature conversion should be done
L
5
can be accessed through bytes 2 and 3 of the scratchpad as explained
bit 13
bit 5
DIGITAL OUTPUT
0000 0101 0101 0000
0000 0001 1001 0001
0000 0000 1010 0010
0000 0000 0000 1000
0000 0000 0000 0000
1111 1111 1111 1000
1111 1111 0101 1110
1111 1110 0110 1111
1111 1100 1001 0000
L
2
S
1
registers are NV (EEPROM) so they will retain data when the
bit 4
(Binary)
2
5
4 of 19
bit 12
bit 4
2
S
0
bit 3
2
5
bit 11
bit 3
2
S
-1
DIGITAL OUTPUT
H
bit 2
and T
2
2
bit 10
bit 2
00A2h
FFF8h
FF5Eh
FE6Fh
FC90h
L
0550h
0191h
0008h
0000h
(Hex)
2
2
H
L
-2
or higher than or equal to T
6
comparison since T
and T
bit 1
2
1
L
registers (see Figure
bit 1
bit 9
2
2
-3
5
bit 0
2
DS1822-PAR
0
H
bit 0
bit 8
2
2
and T
-4
4
H
L
,