DS2722-F-03 MICRO-LINEAR [Micro Linear Corporation], DS2722-F-03 Datasheet - Page 20

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DS2722-F-03

Manufacturer Part Number
DS2722-F-03
Description
900MHz Low-IF 1.5Mbps FSK Transceiver Final Datasheet
Manufacturer
MICRO-LINEAR [Micro Linear Corporation]
Datasheet
REGISTER INFORMATION
A unidirectional 3-wire serial bus sets the ML2722’s transceiver parameters and programs the PLL circuits.
Programming is performed by entering 16-bit words into the ML2722 serial interface. Three 16-bit registers are
partitioned such that 14 bits are dedicated for data to program the operation and two bits identify the register address.
The three registers are:
§
§
§
Figure 5 shows a register map. Table 4 through Table 6 provide detailed diagrams of the register organization: Table 4
and Table 5 outline the PLL configuration and channel frequency registers, and Table 6 displays the filter tuning and test
mode register.
DS2722-F-05
DB13
DB13
DB13
Res.
Res.
Res.
MSB
MSB
MSB
CONTROL INTERFACES AND REGISTER DESCRIPTIONS
Register 0:
Register 1:
Register 2:
B15
B15
B15
DB12
DB12
DB12
Res.
Res.
Res.
B14
B14
B14
DB11
DB11
DB11
CHQ11
Res.
Res.
B13
B13
B13
DB10
DB10
DB10
CHQ10
PLL Configuration
Channel Frequency Data
Internal Test Access
Res.
Res.
B12
B12
B12
DB9
DB9
DB9
CHQ9
Res.
Res.
B11
B11
B11
DB8
DB8
DB8
CHQ8
FINAL DATASHEET
Res.
Res.
B10
B10
B10
14-bit Data
DB7
14-bit Data
DB7
14-bit Data
DB7
Figure 5. Register Organization
CHQ7
Res.
Res.
B9
B9
B9
DB6
DB6
DB6
CHQ6
Res.
Res.
B8
B8
B8
DB5
DB5
DB5
CHQ5
DTM2
TPC
B7
B7
B7
DB4
DB4
DB4
CHQ4
DTM1
TXCL
B6
B6
B6
DECEMBER 2003
DB3
DB3
DB3
CHQ3
DTM0
LOL
B5
B5
B5
DB2
DB2
DB2
CHQ2
ATM2
RXCL
B4
B4
B4
DB1
DB1
DB1
CHQ1
ATM1
RD0
B3
B3
B3
DB0
DB0
DB0
CHQ0
ATM0
QPP
B2
B2
B2
ADR1
ADR1
ADR1
ML2722
2-bit Address
2-bit Address
2-bit Address
0
0
1
B1
B1
B1
ADR0
ADR0
ADR0
0
1
0
B0
B0
B0
20

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