DS2722-F-03 MICRO-LINEAR [Micro Linear Corporation], DS2722-F-03 Datasheet - Page 18

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DS2722-F-03

Manufacturer Part Number
DS2722-F-03
Description
900MHz Low-IF 1.5Mbps FSK Transceiver Final Datasheet
Manufacturer
MICRO-LINEAR [Micro Linear Corporation]
Datasheet
There are two control interfaces: PARALLEL and SERIAL.
PARALLEL INTERFACE
The parallel interface provides immediate control and monitoring of the ML2722. Input signals include:
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Output signals include:
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SERIAL INTERFACE
A 3-wire serial interface (EN, DATA, CLK) is used for programming the ML2722 configuration registers, which control
device mode, pin functions, PLL and reference dividers, internal test modes, and filter alignment. Data words are
entered beginning with the MSB (“big-endian”). The word is divided into a leading 14-bit data field followed by a 2-bit
address field. When the address field has been decoded the destination register is loaded on the rising edge of EN.
Providing less than 16 bits of data will result in unpredictable behavior when EN goes high.
Data and clock signals are ignored when EN is high. When EN is low, data on the DATA pin is clocked into a shift
register by rising edges on the CLK pin. The information is latched when EN goes high. This serial interface bus is
similar to that commonly found on PLL devices. The data latches are implemented in static CMOS and use minimal
power when the bus is inactive. Table 3 and Figure 4 provide timing and register programming illustrations.
DS2722-F-05
CONTROL INTERFACES
XCEN:
RXON:
REF:
RSSI:
PAON:
Transceiver enable. Places the ML2722 in Standby or Active (when asserted) modes.
Receive On. Places an Active ML2722 in Receive mode when asserted.
Reference frequency input
Received Signal Strength Indicator: indicates the power of the received signal
External Power Amplifier Control Pin
FINAL DATASHEET
DECEMBER 2003
ML2722
18

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