74AHCT3G14DC,125 NXP Semiconductors, 74AHCT3G14DC,125 Datasheet - Page 2

IC INV SCHMITT TRIGGER 8VSSOP

74AHCT3G14DC,125

Manufacturer Part Number
74AHCT3G14DC,125
Description
IC INV SCHMITT TRIGGER 8VSSOP
Manufacturer
NXP Semiconductors
Series
74AHCTr
Datasheet

Specifications of 74AHCT3G14DC,125

Number Of Circuits
3
Logic Type
Inverter with Schmitt Trigger
Package / Case
US8, 8-VSSOP
Number Of Inputs
1
Current - Output High, Low
8mA, 8mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AHCT
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHCT3G14DC-G
74AHCT3G14DC-G
935275104125
NXP Semiconductors
4. Ordering information
Table 1.
5. Marking
Table 2.
[1]
6. Functional diagram
74AHC_AHCT3G14
Product data sheet
Type number
74AHC3G14DP
74AHCT3G14DP
74AHC3G14DC
74AHCT3G14DC
74AHC3G14GT
74AHCT3G14GT
74AHC3G14GD
74AHCT3G14GD
Type number
74AHC3G14DP
74AHCT3G14DP
74AHC3G14DC
74AHCT3G14DC
74AHC3G14GT
74AHCT3G14GT
74AHC3G14GD
74AHCT3G14GD
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Logic symbol
Ordering information
Marking codes
1A
3Y
2A
001aah728
Package
Temperature range Name
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
1Y
3A
2Y
All information provided in this document is subject to legal disclaimers.
Fig 2.
TSSOP8
VSSOP8
XSON8
XSON8U
Rev. 6 — 18 November 2010
IEC logic symbol
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1 × 1.95 × 0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3 × 2 × 0.5 mm
001aah729
74AHC3G14; 74AHCT3G14
Marking code
A14
C14
A14
C14
A14
C14
A14
C14
[1]
Fig 3.
A
Triple inverting Schmitt trigger
Logic diagram
(one Schmitt trigger)
© NXP B.V. 2010. All rights reserved.
Version
SOT505-2
SOT765-1
SOT833-1
SOT996-2
mna025
2 of 18
Y

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