pe-68531g Pulse Specialty Components, pe-68531g Datasheet - Page 2

• Manufacturer Part Number: pe-68531g
• Description: Pe-6853xg Fastpulse High Speed Transceivers
• Manufacturer: Pulse Specialty Components

Functional Description
The key functions of the transceivers are outlined in the block
diagram above.
In the transmit channel, the PECL (100 K) signals from the PHY
chip set (TD±) are encoded to appropriate line coding and driven
out differentially by the edge-controlled transmit amplifier in the
transceiver IC. The wideband transformer provides the required
1500 V isolation and the common mode choke eliminates high
frequency common mode noise. The magnetics are tuned
specifically to the characteristics of the transceiver IC to give a
highly balanced system with optimum signal rise-time, minimum
jitter and low emissions. The transformers exhibit a high minimum
inductance in order to counter signal droop in the presence of DC
bias. The outputs are fully terminated with cable impedance (100
section for full transmitter specifications.
In the receive channel, the incoming differential signal from the
cable passes through a wideband isolation transformer and the
choke, before being filtered and terminated for high frequency
noise rejection. The resulting differential signal is fed to
transceiver IC for adaptive equalization, baseline restoration and
line decoding. Adaptive equalization is necessary to compensate
for the frequency dependent attenuation and phase distortion
which the signal suffers in the cable. The optimum compensation
required will vary with cable length and so a high performance
adaptive equalizer is employed which constantly adjusts itself
FASTPULSE HIGH SPEED
LAN TRANSCEIVERS
Block Diagram
) to meet return loss specification. See electrical characteristics
U.S.A: TEL [phone]
GND
GND
VCC
VCC
RD+
SD+
TD+
RD-
TD-
5
1
2
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4
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8
9
Notes:
1. PE-68531/37G implement MLT3. PE-68532/38G implement NRZ
2. Dotted line indicates the transceiver IC function.
3. RJ-45 pinout shown is for PE-68531/32G. See pinout specifications for PE-68537/36G.
RESTORATION
(MLT3/NRZ)
ENCODER
BASELINE
DETECT
SIGNAL
1
EUROPE: TEL [phone]
(MLT3/NRZ)
DECODER
1
AMPLIFIER
TRANSMIT
EQUALIZER
ADAPTIVE
2
AMPLIFIER
by means of a data quantized feedback loop. The equalizer
characteristics reflect the EIA/TIA 568 cable standard and
extensive modeling of UTP-5 cable characteristics under real life
conditions. The operation of the equalizer can be seen in the
performance section. The baseline restoration loop performs a
DC restoration on the incoming signal (as defined in ANSI TP-
PMD recommendation) which may occur due to data pattern
dependent DC shifts and the inherent low frequency bandwidth
limitations of the channel and AC coupling transformers. If not
corrected, this DC drift (or baseline wander) can cause
degradation in signal/noise ratio and can result in data errors. The
baseline restoration loop in the transceiver constantly monitors
the incoming signal and restores the DC level to a nominal level.
The resulting amplified, equalized and DC restored signal is
decoded in the line decoder as per appropriate scheme and
driven out as differential 100 K PECL signals RD±. See electrical
characteristics section for full receiver specifications.
The signal detect function monitors the equalized incoming signal
to notify PHY controller that a valid signal is received. This is
explicitly required by the TP-FDDI specification and is optional for
ATM system designers. The SD signal is driven out as single-
ended PECL signal.
The unused signal pairs in the RJ-45 are terminated at their
common mode impedance to minimize EMI emissions.
AGC
ASIA: TEL [phone]
TERMINATION
FILTER &
TERMINATION
FILTER &
WEB: http://www.pulseeng.com
STAKE POST
STAKE POST
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SHIELD
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