em6521 EM Microelectronic, em6521 Datasheet - Page 9
em6521
Manufacturer Part Number
em6521
Description
Mfp Version Of Em6621 Ultra Low Power Microcontroller With 4x20 Lcd Driver
Manufacturer
EM Microelectronic
Datasheet
1.EM6521.pdf
(68 pages)
- Current page: 9 of 68
- Download datasheet (2Mb)
Figure 6. Reset Structure
4
F igure 6. illustrates the reset structure of the EM6521. One can see that there are six possible reset sources :
1 1 0 H
Reset CPU
All reset sources activate the System Reset and the Reset CPU. The ‘System Reset Delay’ ensures that the
system reset remains active long enough for all system functions to be reset (active for n system clock cycles).
The ‘CPU Reset Delay’ ensures that the reset CPU remains active until the oscillator is in stable oscillation.
As well as activating the system reset and the reset CPU, the POR also resets all option registers and the
sleep enable (SleepEn) latch. System reset and reset CPU do not reset the option registers nor the SleepEn
latch.
Reset state can be shown on Strobe terminal by selecting StrobeOutSel1,0 = 0 in RegLcdCntl1.
Copyright © 2005, EM Microelectronic-Marin SA
Internal D ata Bus
Reset
W rite Active
R ead Status
(1) Internal initial reset from the Power On Reset (POR) circuitry.
(2) External reset from the Reset terminal.
(3) External reset by simultaneous high/low inputs to port A.
(4) Internal reset from the Digital Watchdog.
(5) Internal reset from the Oscillation Detection Circuit.
(6) Internal reset when sleep mode is activated.
W rite R eset
R ead Status
Analogue
(Combinations are defined in the registers OptInpRSel1 and OptInpRSel2)
Filter
R
PO R
C k[10]
SleepEn
Latch
PO R
R egisters & SleepEn
PO R to O ption
O scillation
W atchdog
D etection
DEBO U N CE
Latch
Digital
Ck[1]
C k[8]
Sleep
Latch
O scillation
W atchdog
Detection
D igital
Inhibit
Inhibit
PO R
S ystem R eset
9
C k[15]
D elay
--> POR
--> System Reset, Reset CPU
--> System Reset, Reset CPU
--> System Reset, Reset CPU
--> System Reset, Reset CPU
Enable
Activate
C P U R eset
R eset PAD
R eset from Port A
Input Com bination
O ptInpR Sleep
Sleep
D elay
Ck[1]
-->
www.emmicroelectronic.com
EM6521
System
R eset
C PU
Reset,
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